-
generic_dpram
IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY
- 2013-09-30 19:03:40下载
- 积分:1
-
shuzishizhong
基于DE2-115开发板设计的一个数字钟,能进行正常的小时、分、秒计时功能,并分别由开发板上面的数码管显示秒(60s)、分(60min)、小时(24hours)的时间。并具有手动调整时间的功能(DE2-115 board design based on a digital clock, and enables the normal hours, minutes, seconds chronograph function, and were above the development board digital display seconds (60s), points (60min), hours (24hours) time . And has a function to manually adjust the time)
- 2020-11-01 11:39:54下载
- 积分:1
-
FPGA
Verilog学习例程EP2C5,内有跑马灯等18个程序(Verilog learning routines EP2C5, marquees and other 18 programs)
- 2020-12-06 22:29:21下载
- 积分:1
-
3FP
一个三分频verilog模块,可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)
- 2013-08-25 00:41:29下载
- 积分:1
-
all clock
数字钟通过verilog实现,并且支持Modelsim仿真(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:01下载
- 积分:1
-
基于MATLAB模型设计的FPGA开发与实现
说明: MATLAB的SIMULINK和FPGA联合设计滤波器等,摆脱了传统的代码设计。(MATLAB's SIMULINK and FPGA jointly design filters and so on, and get rid of the traditional code design.)
- 2020-10-23 16:07:23下载
- 积分:1
-
fpga1
说明: 基于EasyFPGA030的直流电机控制电路设计和四位数字密码锁。(DC Motor Control Based on EasyFPGA030 circuit design and four-digit combination lock.)
- 2010-05-03 20:20:42下载
- 积分:1
-
ioRWTest
C6000系列之6701开发板相关文件及说明(C6000 Series of 6701 development board-related documents and notes)
- 2008-04-17 17:08:58下载
- 积分:1
-
Verilog HDL怎样用FPGA实现PID控制器
资源描述本文讲的是基于FPGA的模糊PID控制器实现,详细介绍了Verilog HDL怎样用FPGA实现PID控制器
- 2022-02-02 21:59:26下载
- 积分:1
-
LDPC_en-decoder-master
说明: LDPC的编解码的实现,适合初学者学习,大家可以多交流(The implementation of LDPC Encoding and decoding is suitable for beginners to learn)
- 2021-04-21 16:18:49下载
- 积分:1