-
the realization of paragraph ep2c5 register verilog language, quartus 2 Simulati...
ep2c5 实现 段寄存器
verilog语言，quartus 2 仿真-the realization of paragraph ep2c5 register verilog language, quartus 2 Simulation
- 2022-03-15 03:31:41下载
- 积分：1
-
hdmi
HDMI协议的Verilog实现，通过对RGB三个通道分别进行TMDS编码完成，纯原创代码(Verilog implementation of HDMI protocol, through TMDS coding of RGB three channels, pure original code)
- 2020-07-28 16:58:46下载
- 积分：1
-
硬件描述语言
verilog HDL 4×4矩阵键盘驱动程序包括硬件电路图-verilog
- 2022-04-27 04:55:21下载
- 积分：1
-
这是本人写的可显示128*64LCD全屏汉字的程序,直接下到片子里即可出现象(需自己定制ROM).想显示第二屏的话只需加一个状态即可....
这是本人写的可显示128*64LCD全屏汉字的程序,直接下到片子里即可出现象(需自己定制ROM).想显示第二屏的话只需加一个状态即可.-I write this is the display of 128* Embedded full screen characters procedures, directly to the unit under the blankets will be out phenomenon (it-yourself customized ROM). to the second screen shows only the state can be a plus .
- 2022-04-07 10:48:15下载
- 积分：1
-
asynchronous serial communication port of the FPGA, function (1) serial data rec...
异步串口通信口在FPGA实现，功能有（1）串行数据接收的同步控制；（2） 串行数据发送的同步控制-asynchronous serial communication port of the FPGA, function (1) serial data receiver synchronization control; (2) the transmission of serial data synchronization control
- 2023-06-21 16:25:03下载
- 积分：1
-
fpgaConfig_V1_2_SFLASH_20090507a
自己写的一个使用单片机配置FPGA的下位机C代码，使用一个C8051F330,外置SPI FLASH,通过串口可将程序写入FLASH,上电时自动加载到FPGA完成配置。(Wrote it myself, using a microcontroller to configure FPGA code for the next bit plane C, using a C8051F330, external SPI FLASH, the program is written through the serial port can be FLASH, power-on automatically loaded into the FPGA to complete the configuration.)
- 2021-02-16 07:29:47下载
- 积分：1
-
《Verilog HDL 程序设计教程》3
《Verilog HDL 程序设计教程》3-"Verilog HDL Design Guide" 3
- 2023-02-08 02:25:03下载
- 积分：1
-
VHDL实现交通灯
VHDL实现交通灯-VHDL traffic lights
- 2022-04-07 20:09:13下载
- 积分：1
-
Based on VHDL+ FPGA design of the DDS signal gennerator has been through debug mode
一个用VHDL设计的DDS信号发生器，包括两个pics的仿真结果。
- 2022-09-21 09:15:03下载
- 积分：1
-
clk_div3
在fpga中对于pll无法完成的分频，可采用计数方式，本例用状态机实现对时钟的奇数分频。(Pll in fpga can not be completed in the sub-frequency counting method can be used, in this case with the state machine to achieve an odd number on the clock frequency.)
- 2010-07-28 20:03:41下载
- 积分：1
