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gtx
ip core of the transceiver gtx
- 2019-04-02 00:10:03下载
- 积分:1
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USB接口控制器参考设计VHDL代码,方便开发FPGA人员进行USB的开发,是一个不错的源码。...
USB接口控制器参考设计VHDL代码,方便开发FPGA人员进行USB的开发,是一个不错的源码。-USB interface controller reference design VHDL code, facilitate the development of FPGA personnel USB development, is a good source.
- 2022-01-23 10:28:51下载
- 积分:1
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软件开发环境:ISE 7.1i
仿真环境:ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共...
软件开发环境:ISE 7.1i
仿真环境:ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共八个灯的交通灯控制器;
2. 工程在project文件夹中,双击traffic.ise文件打开工程;
3. 源文件在rtl文件夹中,traffic.v为设计文件,traffic_tb.tbw是仿真波形文件;
4. 打开工程后,在工程浏览器中选择traffic_tb.tbw,在Process View中双击“Simulation Behavioral Model”选项,进行行为仿真,即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ISE Simulator1. Realize this instance through the ISE Simulator tool to achieve a total of eight lights in both directions of traffic lights controller 2. Works project folder, double-click traffic.ise Open the project document 3. rtl source file in the folder, traffic.v for design documents, traffic_tb.tbw is the simulation waveform files 4. to open a project, the project browser, select traffic_tb.tbw, in the Process View in the double hit
- 2022-08-09 15:58:02下载
- 积分:1
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ADPCM
说明: APPCM算法和AD/DA芯片驱动在CPLD中的实现,已在实际硬件中测试OK,quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)
- 2009-08-22 10:07:03下载
- 积分:1
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OFDM_618
说明: 基于FPGA的OFDM同步,包含时钟模块、ROM读取模块、峰值检测模块、帧同步模块(OFDM synchronization based on FPGA includes clock module, Rom reading module, peak detection module and frame synchronization module)
- 2020-08-12 16:41:34下载
- 积分:1
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mig_7series_v1_9
DDR3控制器源码,针对XilinxFPGA的DDR3控制器的源码,已经验证通过。(DDR3 Controller,complete DDR3 controll,have pass verificaion.)
- 2016-08-16 09:27:43下载
- 积分:1
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DDS FPGA开发下的verilog源代码
DDS_AD9854_for FPGA ,FPGA开发下的verilog源代码,信号发生器(DDS_AD9854_for FPGA, verilog source code, signal generator.)
- 2013-01-14 00:13:36下载
- 积分:1
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6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram,然后主机通过9054到双口ram,交换数据完成
6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram,然后主机通过9054到双口ram,交换数据完成-6713emiftofpgatopci, this is a complete set of the EMIF from 6713 to the FPGA
- 2022-01-25 23:08:47下载
- 积分:1
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正弦信号发生器(可扫频)通过验证
正弦信号发生器
正弦信号发生器(可扫频)通过验证
正弦信号发生器-Sinusoidal signal generator (which can be swept) through the validation of sinusoidal signal generator
- 2022-04-10 22:34:24下载
- 积分:1
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用VHDL语言实现的ARM处理器的标准内核的源代码程序,可在重用...
用VHDL语言实现的ARM处理器的标准内核的源代码程序,可在重用-use of the VHDL standard ARM processor core source code procedures, the reuse
- 2023-06-17 04:15:04下载
- 积分:1