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海力士公司8M字节的SDR SDRAM实现Verilog仿真语言。
Hynix公司8M byte sdr sdram的verilog语言仿真实现。-Hynix company 8M byte sdr sdram realize the Verilog simulation language.
- 2023-07-14 06:05:04下载
- 积分：1
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MUX
说明： 用CASE实现4选1数据选择器 很实用 运用VERILOG(Using CASE to achieve 4 election 1 Data Selector practical use Verilog)
- 2008-09-11 11:37:35下载
- 积分：1
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electric-8.08
The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:
* Custom IC layout
* Schematic Capture (digital and analog)
* Textual Languages such as VHDL and Verilog
(The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:* Custom IC layout* Schematic Capture (digital and analog)* Textual Languages such as VHDL and Verilog)
- 2009-01-09 20:01:17下载
- 积分：1
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数字频率计
设计一简易数字频率计，其基本要求是：
1)测量频率范围0～999999Hz；
2)最大读数999999HZ,闸门信号的采样时间为1s；.
3)被测信号可以是正弦波、三角波和方波；
4)显示方式为6位十进制数显示；
5）具有超过量程报警功能。
5)输入信号最大幅值可扩展。
6）测量误差小于+-0.1%。
7)完成全部设计后，可使用EWB进行仿真，检测试验设计电路的正确性。(The basic requirements of designing a simple digital frequency meter are:
1) The measuring frequency range is 0-999999 Hz.
2) The maximum reading is 999999HZ, and the sampling time of gate signal is 1 s.
3) The measured signal can be sine wave, triangle wave and square wave.
4) The display mode is 6-bit decimal number display.
5) It has alarm function beyond range.
5) The maximum amplitude of input signal can be expanded.
6) The measurement error is less than +0.1%.
7) After completing all the design, EWB can be used to simulate and test the correctness of the circuit.)
- 2019-06-20 12:47:51下载
- 积分：1
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AHB-answers
这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)
- 2020-10-21 12:17:24下载
- 积分：1
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VHDL实现交通灯
VHDL实现交通灯-VHDL traffic lights
- 2022-04-07 20:09:13下载
- 积分：1
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ldpc_decoder_802_3an
802.3an ldpc码编码、译码设计，使用VERILOG hdl语言编写，包括测试代码，(802.3an ldpc code encoding, decoding the design, use of language VERILOG hdl, including test code,)
- 2021-02-14 15:29:49下载
- 积分：1
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key_debounce-source-code
这是fpga按键消抖的源代码，在很多fpga按键实验中都可以用到，能够进行代码移植。(This is the source code of the FPGA buttons, in many FPGA key experiments can be used, and can carry out code.)
- 2015-10-31 10:19:03下载
- 积分：1
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用Verilog HDL实现I2C总线功能，对I2C总线有很大帮助
用Verilog HDL实现I2C总线功能，对I2C总线有很大帮助-I2C bus contrll functions implemented by Verilog HDL.
- 2022-06-01 23:07:46下载
- 积分：1
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lab_5
Introduction to learn laboratry with altera quartus II 9.1
- 2016-12-12 01:24:52下载
- 积分：1
