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pj2-NO.6
基于FPGA的电子密码锁设计-已在开发板上成功运行，通过老师检验。(FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.)
- 2017-05-26 11:54:44下载
- 积分：1
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用FPGA verilog hdl实现千兆以太网MAC。
用FPGA verilog hdl实现千兆以太网MAC。-Using FPGA verilog hdl realize Gigabit Ethernet MAC.
- 2022-05-10 18:11:05下载
- 积分：1
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基于DE2-70开发板的VGA接口实现程序
基于DE2-70开发板的VGA接口实现程序，可在VGA屏幕上显示800*600分辨率的图像，刷新频率60Hz
- 2022-03-12 13:00:51下载
- 积分：1
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- 2022-06-02 03:55:25下载
- 积分：1
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DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。...
DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.
- 2022-03-10 08:09:15下载
- 积分：1
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VGA_DE2_6V
VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)
- 2014-01-07 15:52:09下载
- 积分：1
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Program to implement convolution of two signals.
Program to implement convolution of two signals.
- 2023-04-30 22:25:04下载
- 积分：1
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xiaomi
新版 小米抢购器 -源码
已经测试，代码很有用，已经抢了好几个小米3了，希望对大家有用(The new millet to snap up- source
Have test, the code is useful, has robbed several millet 3, hope useful for everyone)
- 2014-01-08 18:26:40下载
- 积分：1
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DEMO中完成WIAGAND26/32的（EMP7128实现）协议程序源代码
DEMO中完成WIAGAND26/32的（EMP7128实现）协议程序源代码-DEMO completed WIAGAND26/32 (EMP achieved) agreement procedure source code
- 2022-07-16 22:05:55下载
- 积分：1
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这是个vhdl编写的16bit的加减法器
这是个vhdl编写的16bit的加减法器-This is vhdl prepared by the modified instruments used in the 16bit
- 2022-02-15 07:17:54下载
- 积分：1
