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lisa-vhdl2va
通过modelsim仿真检测matlab生成滤波器效果。(Generate the filter through matlab and simulated by modelsim.)
- 2013-12-12 11:17:18下载
- 积分:1
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这是很全的标准库啊,不是1164.vhd,都是一些加,乘,除,平方等操作的包来的....
这是很全的标准库啊,不是1164.vhd,都是一些加,乘,除,平方等操作的包来的.-This is the standard for the whole ah, not 1164.vhd are some increases, multiplication, addition, operational square packages to come.
- 2022-06-21 05:49:57下载
- 积分:1
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psk_rician-channel-MATLAB
QPSK在赖斯信道下的模拟仿真,包括K=6和K=10下的情况(QPSK in, Laisi Xin Road, under the simulation, including the case of K = 6 and K = 10 under)
- 2013-04-26 21:30:18下载
- 积分:1
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Xilinx vivado authoritative course
说明: Xilinx vivado 权威教程,清华大学出版社出版,何宾编著。(Xilinx vivado authoritative course, published by Tsinghua University Press, edited by He Bin.)
- 2019-02-19 20:37:09下载
- 积分:1
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multifre
说明: 资料的内容是实现旋转机械同步整周期采样的数据采集系统相关文献资料,包括鉴相信号如何倍频,机械振动信号相位如何检测等的实现方法。(Information content is for rotating mechanical synchronization synchronous sampling data acquisition system-related documents, including the Kam-believe number to harmonic mechanical vibration signal phase to detection of realization.)
- 2010-04-26 15:56:20下载
- 积分:1
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lab4_0419
Run-Length Encoder
Example:
Input Sequence (hexadecimal format): 0A, 14, 14, 14, 14, 14, 14, 14, 56, 56, 56, 56, 56, 32, 32, 07
Output Sequence (hexadecimal format): 0A, 14, 87, 56, 85, 32, 32, 07
- 2015-05-04 05:36:31下载
- 积分:1
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altera的关于对数计算的IP core。
altera的关于对数计算的IP core。-altera calculated on the logarithm of the IP core.
- 2022-09-17 13:25:03下载
- 积分:1
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这是一个FPGA
这个是一个基于FPGA的数字图像的整数DCT变换程序,程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
- 2023-04-23 13:25:03下载
- 积分:1
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用VHDL编写的计算器,能实现简单的加减乘除四则运算
用VHDL编写的计算器,能实现简单的加减乘除四则运算
- 2022-03-18 17:26:25下载
- 积分:1
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altera de2 开发板 vga lcd控制quatus 工程
altera de2 开发板 vga lcd控制quatus 工程-altera de2 board vga lcd control quatus works
- 2023-05-15 10:55:03下载
- 积分:1