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report
说明: report for a report for a class
- 2019-04-17 21:19:15下载
- 积分:1
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c_fir_ppt
C语言写得FIR滤波器代码,简单实用,是学习滤波器设计的好材料,附带PPT滤波器设计说明(C language written FIR filter code, simple and practical, is a good learning materials of filter design, with PPT filter design
)
- 2020-07-04 03:00:02下载
- 积分:1
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非常好的SDRAM Controller 设计文档。工程必备
非常好的SDRAM Controller 设计文档。工程必备-SDRAM Controller Design of a very good document. Works required
- 2023-08-30 16:25:04下载
- 积分:1
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04_uart_test
说明: 基于FPGA的串口发送和接收,使用的verlilog语言(Using Verilog serial port program, send and receive.)
- 2020-10-13 10:33:10下载
- 积分:1
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Walsh
说明: 利用ISE编写的产生WALSH码的verilog程序,简单易懂,稍稍修改就可以产生出自己想的8 16 32 64位的WALSH码。。(Prepared using ISE verilog code generated WALSH procedures, easy to understand, a little modification can generate their own like the 8,16,32,64-bit code WALSH. .)
- 2010-04-20 09:55:10下载
- 积分:1
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microcoded_TB
its a verilog code for microcoded tb
- 2010-03-16 00:21:39下载
- 积分:1
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Synopsys使用基本步骤使用的集成工具,有用的好东西
使用synopsys的基本步骤,综合工具的使用说明,有用的好东西-Synopsys using the basic steps to use the integrated tools, useful good things
- 2022-04-06 15:39:11下载
- 积分:1
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exercise3
用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)
- 2013-08-30 11:12:09下载
- 积分:1
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用VHDL语言编写的写存储器程序,可下载在FPGA中使用
用VHDL语言编写的写存储器程序,可下载在FPGA中使用-VHDL language used to write memory program can be downloaded in the FPGA using
- 2022-06-17 11:46:31下载
- 积分:1
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AD7980
AD9850 VERILOG代码 硬件验证过,可以使用。
- 2021-05-07 15:37:36下载
- 积分:1