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usbhostslave
说明： USB主机和设备的verilog代码，实现了USB1.1协议规范的要求(USB host and equipment Verilog code to achieve the USB 1.1 protocol specification requirements)
- 2005-09-13 11:34:09下载
- 积分：1
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DE2_115_NIOS_DEVICE_LED
DE2-115开发板LED显示测试源码，对fpga开发者提供参考(DE2-115 development board LED display test source, provide a reference for fpga developer)
- 2011-09-29 15:07:10下载
- 积分：1
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ROM
4 bit ROM for Quartus
- 2009-09-14 08:45:22下载
- 积分：1
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VHDLDesignandFPGAImplementationofLDPCDecode
说明： 一篇关于LDPC解码算法的FPGA用VHDL实现的PDF文件，老外写的，还可以，可以参考，欢迎大家下载！(A PDF about the FPGA implementation of LDPC algorithm, written by foreigners, but also, you can refer to, welcome to download!)
- 2020-03-23 20:33:51下载
- 积分：1
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用VHDL编写的4、7、40、64、84计数器，可将程序中的具体数字设成任意值。...
用VHDL编写的4、7、40、64、84计数器，可将程序中的具体数字设成任意值。-Using VHDL written 4,7,40,64,84 counter, you can program specific figures set to any value.
- 2023-02-12 05:30:04下载
- 积分：1
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基于DE2开发板的VGA显示模块，仅供大家参考
基于DE2开发板的VGA显示模块，仅供大家参考-DE2 development board based on the VGA display module, for your reference
- 2022-03-21 02:14:24下载
- 积分：1
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a cycle ruduandency code
实现一个循环冗余码,是老师给的例子，别的同学已经验证-a cycle ruduandency code
- 2023-04-27 23:30:03下载
- 积分：1
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24x24-booth
可用的24位x24位的booth乘法器的verilog代码(24X24 booth muplily)
- 2011-06-09 17:59:26下载
- 积分：1
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利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期
利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期-Use of FPGA technology to achieve the pulse-width test, based on VHDL, test error of clock cycles
- 2022-06-26 11:28:29下载
- 积分：1
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UART
A simple preoteus based design to display the characters typed int the keyboard into LCD using UART of 8051.Plz make sure that TTL to RS232 is inserted in between the microcontroller and virtual terminal which is not shown in the design.
- 2009-12-24 00:04:13下载
- 积分：1
