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my_or
verilog 或门程序 初学者必备。。。。。。。。。。。。(verilog )
- 2009-05-26 16:07:42下载
- 积分：1
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PCIE资料和仿真教程1-6
PCIE仿真设计教程1-6，我帮大家收集到一起了(PCIE simulation design tutorial 1-6, I help you gather together.)
- 2020-11-09 19:29:46下载
- 积分：1
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This tutorial presents some basic concepts that can be helpful in debugging of a...
This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.
- 2022-08-19 12:45:10下载
- 积分：1
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电梯的vhdl设计，6层楼含开关门，警报，内部请求，外部请求
电梯的vhdl设计，6层楼含开关门，警报，内部请求，外部请求-Vhdl elevator design, six floors with switch doors, alarm, internal requests and external requests
- 2022-06-27 17:04:01下载
- 积分：1
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16QAM
16QAM调制解调程序画出时域波形、 正交分量、同相分量波形，眼图，散点图等(16QAM modulation and demodulation process to draw time-domain waveform, quadrature components, in-phase component waveforms, eye diagrams, scatter plots, etc.)
- 2013-06-04 22:10:41下载
- 积分：1
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自适应均衡器
自适应均衡器
- 2023-05-01 16:30:08下载
- 积分：1
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Manchester-code-of-VHDL-program
利用FPGA实现硬件的VHLD语言的Manchester code。(Hardware implementation using FPGA VHLD language Manchester code.)
- 2013-07-14 22:08:25下载
- 积分：1
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系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序...
系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序-coefficient of the four scrambler generator, and every four scrambler have triggered a string conversion and the trigger signal can be used to trigger 4b/5b coding signal. Verilog procedures, with test procedures
- 2022-08-08 00:04:21下载
- 积分：1
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LMS
verilog实现的LMS的算法，另外有tb文件可以测试已测试代码正确……(verilog implementation of LMS algorithm, another tb files can test the code has been tested properly ......)
- 2021-03-12 15:29:25下载
- 积分：1
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vhdl+verilog
小波提升算法源码，里面一个txt文件可以当作算法参考；(Wavelet lifting algorithm source code, inside a TXT file can be used as algorithm reference;)
- 2018-06-20 09:28:28下载
- 积分：1
