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sparc org, vhdl rtl code
sparc org, vhdl rtl code
- 2022-04-19 15:34:55下载
- 积分：1
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八路AD采集adc128s022
FPGA AD采集八路数据，12位分辨率，小梅哥FPGA的开发程序，实测可用(FPGA AD collects eight path data, 12 bit resolution, and the development program of Mayo FPGA.)
- 2020-12-17 16:59:11下载
- 积分：1
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VHDL与源代码包
VHDL与源代码包-and VHDL source code
- 2022-04-27 02:45:55下载
- 积分：1
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SimpleSpi
master spi的源代码（verilog），包括文档，测试程序(master spi the source code (verilog), including documentation, testing procedures)
- 2007-01-29 21:03:51下载
- 积分：1
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VHDL语言设计；功能描述：键盘扫描，不包含去抖电路
VHDL语言设计；功能描述：键盘扫描，不包含去抖电路-VHDL language design Function description: the keyboard scanning, does not contain a circuit debounced
- 2022-08-26 08:21:49下载
- 积分：1
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FPGA
基于FPGA的VHDL编程实现各种音频信号，采用的是周立功公司的fusion_startkit开发板。-FPGA-based VHDL Programming realize a variety of audio signals, are used by companies fusion_startkit weeks Ligong development board.
- 2022-07-15 20:29:13下载
- 积分：1
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VHDL洗衣机控制器
VHDL 洗衣机程序，可实现定时、报警、洗衣，脱水等等功能。底层为VHDL文件，顶层为电路图连接
- 2023-07-12 00:20:04下载
- 积分：1
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f500
verilog coding for butterworth filter with cut off
frequency with 500hz
- 2014-02-19 15:37:09下载
- 积分：1
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下午5点的代码及说明，verilog代码，几乎所有的IC面试都会问…
5分代码及说明，verilog代码，几乎所有的IC面试都会问到这个问题，所以总结了一下发了上来，共同学习！-5 pm code and explanations verilog code Almost all the interviews will IC asked this question, summed up in the ranks about fat, learn together!
- 2022-02-21 11:34:44下载
- 积分：1
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all passed, I was carefully designed, fully meet the requirements of beginners....
全部通过，是我的精心设计，完全满足初学者的要求。0-99自动记数-all passed, I was carefully designed, fully meet the requirements of beginners. 0-99 automatic counting
- 2022-05-05 06:11:20下载
- 积分：1
