-
Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考....
Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考.-Clock_Dithering_Verilog this is a Clock u_dither, everybody want to make Verilog-jitter can refer to.
- 2022-12-08 19:40:03下载
- 积分:1
-
conv_encoder
TD-LTE中(3.1.7)咬尾卷积码编码器verilog代码(Tail-biting convolutional code encoder verilog code)
- 2014-04-09 11:12:43下载
- 积分:1
-
here is gangadhar call by mailing me
here is gangadhar call by mailing me
- 2022-01-26 05:55:47下载
- 积分:1
-
基于FPGA的VGA彩条显示 可用PAXplusII仿真
基于FPGA的VGA彩条显示 可用PAXplusII仿真-FPGA-based VGA color display available PAXplusII Simulation of
- 2022-07-12 22:45:31下载
- 积分:1
-
Hamming_decoder-1
this program does something im not sure what but all i want is to get into the damn site thank you
- 2010-09-09 16:46:51下载
- 积分:1
-
all passed, I was carefully designed, fully meet the requirements of beginners....
全部通过,是我的精心设计,完全满足初学者的要求。0-99自动记数-all passed, I was carefully designed, fully meet the requirements of beginners. 0-99 automatic counting
- 2022-05-05 06:11:20下载
- 积分:1
-
VGA信号的产生
产生VGA彩条信号(Verilog 语言)-Generate VGA signal
- 2022-05-05 22:12:14下载
- 积分:1
-
使用LPM_ROM的实际的例子
使用LPM_ROM的实际的例子-Use of practical examples LPM_ROM
- 2022-10-03 13:00:03下载
- 积分:1
-
Version1
小波包分解,重构轴承振动信号,Hilbert包络,FFT进行频谱分析,以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
- 2013-07-17 11:37:05下载
- 积分:1
-
bt656_to_yuv422
从bt656数据流中提取出同步信号, 适合于搞fpga/cpld开发调式(bt656 internel sync to extern sync singal,
bt656 internel sync to extern sync singal)
- 2021-03-06 11:19:30下载
- 积分:1