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LnE
verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)
- 2020-06-30 04:40:02下载
- 积分：1
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softdemodulation-of-8psk
讲述软解调很不错的一片文档，主要阐述的是8PSK的软解调FPGA实现，但对8PSK的软解调原理阐述很清楚，没有多余的东西，但需要注意其中各个调制符号点得顺序。(About soft demodulation of a document is very good, mainly on the soft 8PSK demodulation FPGA, but soft 8PSK demodulation principle describes very clearly, no extra stuff, but need to pay attention to the point where each modulation symbol was in order.)
- 2014-06-03 14:12:05下载
- 积分：1
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fir_digital
本文对数字基带信号脉冲成型滤波的应用、原理及实现进行了研究。首先介绍了数字成型滤波的应用意义并分析了模拟和数字两种硬件实现方法，接着介绍了成形滤波器设计所需要MATLAB软件，以及利用ISE system generator在FPGA上进行滤波器实现的优势。文中给出了成形滤波函数的数学模型，讨论了几种常用成形滤波函数的传输特性以及对传输系统信号误码率的影响。然后介绍了本次设计中使用到的数字成形滤波器设计的几种FIR滤波器结构。把各种设计方案进行仿真，比较仿真结果，最后根据实际应用的情况并结合设计仿真中出现的问题进行分析，得出各种设计结构的优缺点以及适合应用的场合。(In this paper, the application of the principles and implementation of digital baseband signal pulse shaping filter is studied. First introduced the significance of digital shaping filter application and analysis of both analog and digital hardware implementation, then introduces the shaping filter design requires MATLAB software, and the use of ISE system generator on the FPGA to achieve the advantages of the filter. This paper presents a mathematical model of shaping filter function, the transmission characteristics discussed several common shaping filter functions and the impact on the error rate of the signal transmission system. Then introduced the use of this design to several digital shaping filter design FIR filter structure. The various design simulation, compare the simulation results, and finally according to the actual application and combine design simulation to analyze problems, come and where appropriate to the application advantages and disadvantages of various design s)
- 2014-01-15 09:43:56下载
- 积分：1
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verilog实现的1024位的大数模逆算法，引入RAM作为数据通道
verilog实现的1024位的大数模逆算法，引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel
- 2022-12-18 20:35:03下载
- 积分：1
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hdl
网上流传的用来实现FPGA驱动VGA，从而实现一个pingpong小游戏的源码，实测可用。(a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong.
tested.)
- 2009-03-31 22:36:37下载
- 积分：1
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有关FIFO的代码
用VHDL语言写的代码 包括全局的输入时钟缓冲器来去抖动，块RAM模块65536*10，读数据，写数据，空标志信号的产生，满标志信号的产生，读写使能信号的产生七个模块！对各位有帮助噢！
- 2023-01-20 22:45:04下载
- 积分：1
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16位并行相关器的VHDL程序
16位并行相关器的VHDL程序-16 parallel with the VHDL-related procedures
- 2022-02-09 15:11:47下载
- 积分：1
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fft_8
基二8点fftverilog实现。经过modelsim仿真通过(Base 2 fftverilog implementation at 8 o clock. Go through the modelsim simulation)
- 2021-02-21 16:49:42下载
- 积分：1
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vhdl_course_tw_CIC
台湾IC中心VHDL讲义，内容详细，适合IC前端设计参考(Taiwan s IC Center VHDL handouts, detailed reference design for front-end IC)
- 2011-01-10 19:06:38下载
- 积分：1
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How to Connecting Xilinx FPGAs to the Philips
How to Connecting Xilinx FPGAs to the Philips
- 2022-08-14 17:50:57下载
- 积分：1
