登录
首页 » VHDL » xilinx CTC IPcore(encoder 和 decoder)的标准测试,未经信道加噪

xilinx CTC IPcore(encoder 和 decoder)的标准测试,未经信道加噪

于 2022-04-25 发布 文件大小:13.41 kB
0 107
下载积分: 2 下载次数: 1

代码说明:

xilinx CTC IPcore(encoder 和 decoder)的标准测试,未经信道加噪-the standard test of xilinx CTC IPcore (encoder and decoder) , without the channel with noise

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • airthmatic & logic unit
    airthmatic & logic unit
    2023-02-23 08:10:03下载
    积分:1
  • Altera 基础篇公司书籍源码
    Altera 基础篇公司书籍源码-Altera Corporation based on chapter books-source
    2022-10-29 10:20:03下载
    积分:1
  • DE2_NIOSII_uCOSII_2012
    一个简单的UCOSII操作系统,在DE2上面调试通过(A simple UCOSII operating systems, debugging through the DE2 above)
    2012-08-20 10:48:08下载
    积分:1
  • ACO-OFDM
    ACO-OFDM sdakldjas seuekdsjakdnskd
    2021-04-13 22:58:55下载
    积分:1
  • Verilog&Vhdl混语言对SDRAM的控制源代码,提供了很好的例子,顶层文件为sdrm.v!...
    Verilog&Vhdl混语言对SDRAM的控制源代码,提供了很好的例子,顶层文件为sdrm.v!-VerilogVhdl mixed language SDRAM control of the source code, provided a good example of top-level documents sdrm.v!
    2022-03-18 22:36:54下载
    积分:1
  • 05_fifo_test
    说明:  FIFO: First in, First out 代表先进的数据先出,后进的数据后出。Xilinx 在 VIVADO 里为我们已经提供了 FIFO 的 IP 核, 我们只需通过 IP 核例化一个 FIFO,根据 FIFO 的读写时序来写入和读取FIFO 中存储的数据。(FIFO: first in, first out represents the first out of advanced data, and the last in data is the last out. Xilinx has provided us with the IP core of FIFO in vivado. We only need to instantiate a FIFO through the IP core, and write and read the data stored in FIFO according to the FIFO read-write timing.)
    2021-04-08 22:19:20下载
    积分:1
  • vedic_Code
    vedic multiplication
    2015-11-16 19:19:40下载
    积分:1
  • CH2CH1VHDL 数字电路参考书所有程序3
    CH2CH1VHDL 数字电路参考书所有程序3-CH2CH1VHDL digital circuit reference all three procedures
    2022-05-29 17:53:40下载
    积分:1
  • wireless_communication_FPGA
    数字化,宽带化,是当今无线通信的重点主流方向,FPGA以其功能强大,开发周期短,投资少,可重复修改,开发工具智能及软件可升级等特点成为无线通信首选。(Digital, broadband, is the focus of today s mainstream wireless communications, FPGA with its powerful, short development cycle, low investment, repeatable modify, intelligence and software development tools and other characteristics can be upgraded to become the first choice of wireless communication.)
    2015-01-30 22:03:45下载
    积分:1
  • FIR滤波器的基本Verilog代码实现
    FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
    2023-05-26 13:40:03下载
    积分:1
  • 696518资源总数
  • 105895会员总数
  • 18今日下载