登录
首页 » VHDL » A " percentage of seconds, seconds, minutes," digital stopwatch timer c...

A " percentage of seconds, seconds, minutes," digital stopwatch timer c...

于 2022-05-05 发布 文件大小:42.89 kB
0 91
下载积分: 2 下载次数: 1

代码说明:

一个具有“百分秒,秒,分”计时功能的数字跑表,可以实现一个小时以内的精确至百分之一秒的计时。 数字跑表的显示读者可以通过编写数码管显示程序来实现,本训练只给出数字跑表的实现过程。 读者还可以通过增加小时的计时功能,实现完整的跑表功能。-A " percentage of seconds, seconds, minutes," digital stopwatch timer can be achieved within an hour of precision to the hundredth of a second time. Digital stopwatch readers can display the digital display through the preparation of procedures to achieve, given the training is only the realization of the process of digital stopwatch. Readers can also function to increase hours of time to achieve full stopwatch function.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • qam_64
    Verilog语言下QAM调制的DDS实现(The QAM Modulation DDS achieve)
    2021-02-20 11:59:43下载
    积分:1
  • 乘法器是硬件设计中的很常见也很重要的一个模块,它的VHDL硬件实现很好的解决了软件编程中做乘法速度慢的问题,在实时高速系统应用中或DSP软核或数字信号处理硬件实...
    乘法器是硬件设计中的很常见也很重要的一个模块,它的VHDL硬件实现很好的解决了软件编程中做乘法速度慢的问题,在实时高速系统应用中或DSP软核或数字信号处理硬件实现算法中,经常能使用到乘法器,所以经典的高速乘法器IP 很有参考价值-Multiplier is a common and important module in hardware designing.Its VHDL addresses the low speed of multiplication in software programming. Multiplier is often used in real-time high-speed system application , DSP soft core or hardware implementation of digital signal processing,so it is worthful to know classic high-speed multiplier IP
    2022-03-03 00:48:52下载
    积分:1
  • Multiplier
    A multiplier unit in VHDL
    2010-01-05 11:42:02下载
    积分:1
  • fsk调制与解调,此程序经过验证,可以运用,通讯方面的同学可以用...
    fsk调制与解调,此程序经过验证,可以运用,通讯方面的同学可以用-FSK modulation and demodulation, this procedure has been verified and can use communications students can use
    2022-01-26 06:28:59下载
    积分:1
  • DDSVHDLCODE
    本人收集的多个VHDL语言编写的正弦波发生器以及SPWM程序。(I collected multiple VHDL language of sine wave generator SPWM program.)
    2021-04-06 22:39:02下载
    积分:1
  • 对实例的Nios II开发的源代码,主要基于NIO…
    本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。 本示例十分经典,对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
    2022-07-16 15:35:51下载
    积分:1
  • 8B_10BENCODER
    基于8B10B的编解码模块的设计,使用verilog HDL语言,具有实用价值。(8B10B encoder)
    2014-05-23 16:39:25下载
    积分:1
  • performance-of-pcie
    本白皮书探讨了在PCI Express的因素 技术可能会影响性能。它还 提供指导如何估算 的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)
    2013-10-29 10:52:43下载
    积分:1
  • FPGA programming serial communications, the entire source code. Including the si...
    FPGA编程实现串口通信,源代码全。包括仿真程序。-FPGA programming serial communications, the entire source code. Including the simulation program.
    2022-08-25 19:14:53下载
    积分:1
  • CORDIC算法的FFT实现
    本代码实现了 ; ;CORDIC  ; 算法语言;
    2022-09-09 16:25:03下载
    积分:1
  • 696518资源总数
  • 105554会员总数
  • 2今日下载