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i2sound_volume_control
通过代码控制音频编/解码硬件芯片WM8731，
通过按键控制音频输出的音量(Audio codec hardware chip WM8731 is controlled by code, and audio output volume is controlled by keys.)
- 2018-11-27 14:39:51下载
- 积分：1
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This is a use of the VHDL language Parallel to Serial procedures, In altera deve...
这是一个用VHDL语言编写的并口转串口程序，在altera开发系统下验证通过，运用于开发板与计算机之间的通信，源程序可以提供参考-This is a use of the VHDL language Parallel to Serial procedures, In altera development system under test passed, the development of applied between the panels and computer communications, can provide a reference source
- 2022-03-23 13:41:19下载
- 积分：1
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fft_16
基于FPGA用verilog语言实现16点FFT(16-point FFT FPGA-based verilog language)
- 2021-04-18 15:28:51下载
- 积分：1
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Image-Compress-FPGA_DSP
比较详细的阐述了图像压缩的原理,并基于DSP和VHDL实现该系统,最后在FPGA上通过.(More detailed exposition of the principles of image compress, and VHDL-based implementation of the system, and finally in the FPGA.)
- 2013-11-13 15:17:01下载
- 积分：1
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vote7
说明： 自己设计的一个其人投票系统，对于VHDL初学者可以参考下(One of their own design their human voting system, for VHDL beginners can refer to the following)
- 2009-08-30 09:25:04下载
- 积分：1
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8051core-Verilog
用verilog在FPGA内部实现8051内核，超好、超难找的资料！共享出来！(Verilog FPGA internal 8051 core, super, super hard to find! Shared out!)
- 2020-06-28 22:00:02下载
- 积分：1
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是verilog例子。初级适用。包括了简单的例子。
是verilog例子。初级适用。包括了简单的例子。-example. The initial application. Including a simple example.
- 2022-05-31 23:36:48下载
- 积分：1
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mun_base
adfvff f fdfs f dvdsz dz vdzsvd hdfdgvaz
- 2019-03-28 07:33:03下载
- 积分：1
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dianti
6层电梯设计，采用vhdl编写，能够实验电梯功能(6-story elevator design, using vhdl prepared, able to lift function experiments)
- 2014-04-06 11:41:34下载
- 积分：1
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DDS
基于ARM的DDS信号发生器设计，可以产生各种信号的波形，生成所需要的信号，可供实验用(DDS signal generator based on ARM, can produce a variety of signal waveform can be used for experiment)
- 2013-03-29 18:49:52下载
- 积分：1
