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quartus
利用拨码开关控制液晶显示器进行十进制数字显示。(DIP switches control the use of liquid crystal display to decimal figures.)
- 2020-11-24 22:49:33下载
- 积分：1
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Giga8b10bv10
说明： altera发布的开源8b10b源代码，vhdl语言描述(altera released the source code open source 8b10b, vhdl language description)
- 2021-01-22 18:18:41下载
- 积分：1
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WCDMA-Frequency-Domain-Interference-Cancellation-f
WCDMA数字频域干扰抵消器，绝对的高手写的文档和代码，里面资料齐全方便自学，是很好的学习FPGA实现无线通信模块的资料。(WCDMA Frequency Domain Interference Cancellation figures, the absolute master of written documentation and code, which complete information to facilitate self-learning, is a very good learning FPGA implementation of wireless communications and information.)
- 2010-10-31 23:22:34下载
- 积分：1
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通用：我新的FFT VHDL VHDL，我试图用Xilinx的FFT核，但当…
FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results.
here is what I do:
1- from core generator I choose fft core and create .vhd & .vho & .xco files.
2- I add the .xco & .vhd files to my project.
3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.-FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results.
here is what I do:
1- from core generator I choose fft core and create .vhd & .vho & .xco files.
2- I add the .xco & .vhd files to my project.
3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity o
- 2022-06-20 20:06:05下载
- 积分：1
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zuoye2
主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)
- 2013-09-18 15:24:13下载
- 积分：1
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PWM
说明： 通过一个计数器来实现输出信号的占空比要求，可以将duty_cycle分配到拨码开关上,LED分配到发光二极管上,然后调节拨码开关,即可看到LED的亮度发生变化.(The duty cycle of the output signal can be assigned to the dial switch by a counter, and the LED can be assigned to the light emitting diode. Then the brightness of the LED can be seen by adjusting the dial switch.)
- 2020-06-16 13:20:02下载
- 积分：1
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hdmi
说明： HDMI协议的Verilog实现，通过对RGB三个通道分别进行TMDS编码完成，纯原创代码(Verilog implementation of HDMI protocol, through TMDS coding of RGB three channels, pure original code)
- 2020-07-28 16:58:46下载
- 积分：1
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电梯的游戏
在 VHDL 中实现的游戏
实施LFSR创建与随机游戏板
随机颜色。使用VGA控制器和块内存
我们显示游戏板，并写入它取决于某些规则。用户
可以控制如何密游戏板填充，则显示什么颜色，
而如何快速模拟。
- 2022-03-01 01:26:24下载
- 积分：1
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8.4-ADC0809-VHDL-control-program
基于VHDL语言，实现对ADC0809简单控制(Based on VHDL language, to achieve the ADC0809 simple control)
- 2011-11-29 08:43:07下载
- 积分：1
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Hoang_ha_PIC18_for_proteus.2
library of protues aaaaaaaa
- 2013-11-12 12:00:40下载
- 积分：1
