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QMD
实现了QPSK的调制,使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)
- 2019-05-05 15:37:58下载
- 积分:1
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完成的是RS422信号的计数功能,并产生一定的触发信号
完成的是RS422信号的计数功能,并产生一定的触发信号-RS422 signals the completion of the count function, and produce a certain trigger signals
- 2022-04-14 14:08:50下载
- 积分:1
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mux
说明: wallance树实现8*8无符号数的相乘(Multiplication of 8 * 8 unsigned numbers by Wallace tree)
- 2020-06-04 15:03:39下载
- 积分:1
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this project is based on half adder ,full adder,half subtractor and full subtrac...
this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
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this project is based on half adder ,full adder,half subtractor and full subtractor using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
- 2022-12-30 21:40:03下载
- 积分:1
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ethmac10g_latest.tar
10G高速以太网mac VERILOG源码
可仿真可实现(10G high speed Ethernet MAC verilog code
can be used for synthesis or inplementation)
- 2015-08-19 17:39:02下载
- 积分:1
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MD5
哈希算法FPGA实现代码,采用MD5算法,并给出了仿真波形。(MD5 hashing algorithm for FPGA implementation code)
- 2020-07-03 00:40:02下载
- 积分:1
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用verilog HDL语言,通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试...
用verilog HDL语言,通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试
-Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
- 2023-05-23 03:15:03下载
- 积分:1
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vcp201_code是FPGA的源代码。
VCP201_CODE is a FPGA source code.
- 2023-06-03 07:10:03下载
- 积分:1
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FPGA_AD7822
基于FPGA的AD转换控制器设计,AD7822,quartus II,verilog hdl(A Design of the A/D Convertion Control Module Based on FPGA)
- 2011-08-26 15:06:18下载
- 积分:1
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uart
it contains pdf file which has vhdl program of uart (universal asynchoronus receiver and transmitter). which very simple and easy to understand
- 2010-04-22 20:47:55下载
- 积分:1