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VHDL实现简单的8位CPU
doc文件上有源代码
VHDL实现简单的8位CPU
doc文件上有源代码-VHDL simple eight CPU doc documents Active code
- 2023-01-26 05:05:03下载
- 积分：1
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infrared_receive
红外接收处理，根据外部波形记录波形的高低电平时间，从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)
- 2013-09-27 11:09:02下载
- 积分：1
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det
double edfe trigger d latch
- 2014-01-07 19:55:29下载
- 积分：1
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vhdl
说明： 学习vhdl硬件描述语言的一些例子的原代码(VHDL hardware description language to learn some examples of the original code)
- 2008-11-11 20:45:37下载
- 积分：1
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CC
说明： quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助(Quartus an example, in the hope that people just learning a little help Quartus)
- 2008-04-09 14:41:36下载
- 积分：1
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FPGA core code, can be directly used in engineering.
FPGA核心代码，可在工程中直接使用。-FPGA core code, can be directly used in engineering.
- 2022-12-24 15:05:09下载
- 积分：1
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实用的程序代码，希望对大家有用，已经调试通过
实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2022-06-03 06:28:25下载
- 积分：1
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Electric Guitar Digital Effects Processor
Electric Guitar Digital Effects Processor
- 2022-11-09 05:15:03下载
- 积分：1
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基于dds的波形发生器
说明： DDS的基本原理主要由五部分组成，分别是；相位累加器，正弦波形存储器，数模转换器，低通滤波器和时钟，将相位累加器输出的数据作为地址，用来查询表的数据，将取出的正弦数据通过数模转换器输出模拟信号，模拟信号再通过一个低通滤波器输出纯净的正弦波信号。(The basic principle of DDS is mainly composed of five parts: phase accumulator, sinusoidal waveform memory, digital to analog converter, low-pass filter and clock. The output data of phase accumulator is used as address to query the data of table. The extracted sinusoidal data is output analog signal through digital analog converter, and the analog signal is output pure sine through a low-pass filter Wave signal.)
- 2020-09-16 23:34:30下载
- 积分：1
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14_SDRAM
高速流水的SDRAM控制器，最高速度可达速度在200M左右(high speed SDRAM controller)
- 2019-06-17 18:43:54下载
- 积分：1
