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LCD12864
verilog lcd2864 适合初学者(verilog lcd2864 )
- 2013-10-15 18:57:45下载
- 积分:1
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基于VHDL的电梯系统
应用背景基于VHDL实现四层电梯的运动,实现电梯的正常运转关键技术VHDL,状态机,编译码器,触发器,比较器。
- 2023-02-04 04:40:04下载
- 积分:1
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quartusII的环境下的基于Ep3C10144的KeyBoard程序
quartusII的环境下的基于Ep3C10144的KeyBoard程序-quartesII of the environment based on the KeyBoard program Ep3C10144
- 2023-06-25 19:20:05下载
- 积分:1
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spi_interface
spi通用串行总线,4线控制,可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)
- 2019-04-29 12:37:55下载
- 积分:1
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基于verilog的LU分解LUdecompose
基于verilog的LU分解,本文件包括详细的程序代码,运行文件,以及详细的文档(LU decompose based on verilog)
- 2020-07-07 12:58:57下载
- 积分:1
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Verilog languages with four arithmetic logic unit ALU, functional reference to 7...
用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
- 2023-07-06 11:15:03下载
- 积分:1
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256M_sdram_OK
改自特权同学verilog语言写sdram测试程序;支持256M内存(verilog sdram )
- 2013-12-23 16:15:43下载
- 积分:1
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DTMB
能够完美产生数字地面电视(DTMB)的信源的程序。帧头模式为模式一。信道可选择,信号加入频偏,延时,后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)
- 2013-07-25 11:22:28下载
- 积分:1
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对16×16次VHDL实例,如果需要详细的请让我知道
VHDL examples for 16x16 times, if need detail pls let me know
- 2022-04-08 01:26:55下载
- 积分:1
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DigitalClock
数字钟:实验中用到的小程序,用于万年历中的模块(Digital clock: a small program used in the experiment, the modules for calendar)
- 2013-05-26 09:25:23下载
- 积分:1