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DDS
基于ARM的DDS信号发生器设计，可以产生各种信号的波形，生成所需要的信号，可供实验用(DDS signal generator based on ARM, can produce a variety of signal waveform can be used for experiment)
- 2013-03-29 18:49:52下载
- 积分：1
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hilbert_m
基于FPGA的希尔伯特变化的verilog代码(Hilbert change verilog code)
- 2020-10-19 09:37:25下载
- 积分：1
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Design and Implementation of the SNMP Agents
A programming language that can decode alpha numeric
- 2018-12-06 10:15:01下载
- 积分：1
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VHDL language used to achieve 8
用VHDL语言实现8-3线编码器，16-4线编码器-VHDL language used to achieve 8-3 line encoder ,16-4-wire encoder
- 2023-08-20 10:35:02下载
- 积分：1
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float_int
自己编写的，浮点数与整数之间的转换的Verilog HDL实现(Written by myself, it is converted into Verilog HDL integer floating point implementation)
- 2020-12-18 10:29:11下载
- 积分：1
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DDR3_user_design
在Xilinx开发环境ISE13.2上用MIG产生的DDR3 SDRAM控制器，里面生成了Core，可用于DDR3读写控制(On the Xilinx development environment ISE13.2 generated with MIG DDR3 SDRAM controller, which generates the Core, DDR3 can be used to read and write control)
- 2012-02-02 15:16:00下载
- 积分：1
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3.4
移位除乘法器带testbench好用的工程(Useful addition to the shift multiplier works with testbench)
- 2011-07-26 10:54:46下载
- 积分：1
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Source
I2C 控制器的 Verilog源程序2(I2C controller Verilog source 2)
- 2008-12-10 16:05:13下载
- 积分：1
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ad706_verilog
AD706在Sparten6使用的FPGA代码，测试通过(AD706 FPGA Code In Sparten6)
- 2017-02-06 10:39:29下载
- 积分：1
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Push_Boxes
说明： 在Xilinx环境下编写的vhdl程序，实现推箱子的游戏任务，界面很漂亮。(Xilinx environment in the preparation of the VHDL program, realized the game viewing tasks, the interface is very beautiful.)
- 2006-04-27 22:05:39下载
- 积分：1
