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VHDL的重要PPT资料,对初学者非常有益处
VHDL的重要PPT资料,对初学者非常有益处-VHDL important PPT information is very useful for beginners
- 2022-08-23 09:05:36下载
- 积分:1
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D触发器,T触发器计数器MUX采用主动HDL可以运行使用3.2版本…
d flip flop t flip flop counter mux using active hdl can be run using 3.2 version and creating new design
- 2023-06-18 04:40:03下载
- 积分:1
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sampleverilog
图像采集、存储控制verilog源代码(Image acquisition, storage, control of Verilog source code)
- 2021-04-15 22:28:54下载
- 积分:1
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xlj
说明: ilx554b型号CCD积分时间程序的设计,包括两座控制信号(program for ilx554b,the driver include two parts single)
- 2010-04-13 00:57:00下载
- 积分:1
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8051corelcd
fpga上实现的51内核,带有LCD试验,顺利试验成功很好用。(on fpga implementation of 51 core with LCD test, successfully tested well with the smooth.)
- 2014-03-30 14:35:20下载
- 积分:1
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PCIeData-Link-Layer-Specifications
PCIe数据链路层的协议详解,对做PCIe接口有非常重要的指导价值。(PCIe data link layer protocol detailed, do PCIe interface very important value.)
- 2012-08-31 12:33:15下载
- 积分:1
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sobel_edge_detect
sobel边缘检测,用于图像处理。实现了该算法在FPGA上的实现代码。(Sobel edge detection for image processing.Implementation of the algorithm to achieve the FPGA code.)
- 2016-07-17 21:54:26下载
- 积分:1
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pcf8563
pcf8563,在quartusII下VERILOG编写的数字时钟程序,8位数码管显示(pcf8563, written in quartusII VERILOG digital clock program, eight digital display)
- 2013-12-24 21:46:21下载
- 积分:1
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关于vhdl的一些例子
关于vhdl的一些例子-on some of the examples of VHDL
- 2022-01-28 04:13:20下载
- 积分:1
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VHDL
用VHDL语言实现一Mealy型时序电路,并做时序仿真和功能仿真检验正确与否。(Implement a Mealy-type sequential circuits using VHDL language, and do functional simulation and timing simulation test correct.)
- 2014-03-20 14:44:28下载
- 积分:1