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Using VHDL realize CPLD (EMP240T100C5) of the PWM output
利用VHDL实现CPLD(EMP240T100C5)的PWM输出-Using VHDL realize CPLD (EMP240T100C5) of the PWM output
- 2022-05-27 08:17:35下载
- 积分:1
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I2C的VHDL源码,从机模式,编译通过。
I2C的VHDL源码,从机模式,编译通过。-I2C the VHDL source code, from the mode, the compiler through.
- 2023-01-11 08:00:03下载
- 积分:1
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ADC实验
用于单片机的adc采集实验,经过降噪处理,结果精确(ADC acquisition experiment for single chip computer, after noise reduction processing, the result is accurate)
- 2018-11-27 21:41:13下载
- 积分:1
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sep_fram_v0.0
直接序列扩频系统的收发系统,可以进行参数配置(this is a Verilog program )
- 2016-03-01 13:22:03下载
- 积分:1
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cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分:1
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FPGA的SRAM存储器的控制程序,包括时序测试
FPGA的SRAM存储器的控制程序,包括时序测试-FPGA
- 2023-03-19 08:20:03下载
- 积分:1
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matlab2DPSK
蒙特卡洛仿真图
这个程序对2psk信号进行仿真
前提是把信号能量归一化了
(This programme intend to realize the simulation of 2DPSK through MonteCarlo experiment.
intends
)
- 2013-05-04 13:18:00下载
- 积分:1
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State.Machine.Coding.Styles.for.Synthesis(状态机,英文,VHDL)
State.Machine.Coding.Styles.for.Synthesis(状态机,英文,VHDL)-State.Machine.Coding.Styles.for.Synthesis (FSM, English, VHDL)
- 2023-06-02 11:25:02下载
- 积分:1
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liushuideng
使用430的四系点亮流水灯,内置有时钟函数,函数简单,值得一看(The four lines using 430 lit water lights, built-in clock function, the function is simple, eye-catcher)
- 2013-08-31 15:23:06下载
- 积分:1
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cordic_dds
采用CORDIC算法的直接数字频率合成器的设计(CORDIC algorithm uses direct digital frequency synthesizer design)
- 2015-08-18 16:15:17下载
- 积分:1