-
82 VHDL, verilog test case, involving a variety of grammatical rules. which is...
包括VHDL、verilog在内的各种设计实例，是学习硬件描述语言的帮手。共有82个实验例子，涉及各种语法规则。-82 VHDL, verilog test case, involving a variety of grammatical rules. which is you learn the HDL language helper.
- 2023-06-06 10:15:04下载
- 积分：1
-
edaczcjfq
出租车计费，器设计一个出租车自动计费器，计费包括起步价、行车里程计费、停止和暂停不计费三部分。现场模拟汽车的启动、停止、暂停和换挡状态。分别用四位数码管显示金额和里程，各有两位小数，行程 3公里内，起步费为6元，超过3公里，以每公里1.3元计费(Car repair billing device)
- 2018-05-04 11:34:33下载
- 积分：1
-
Nios-II
数字电路的设计。以软件方式实现硬件电路，功能强大，开发容易。(Digital circuit design. With software to realize the hardware circuit, powerful, development easy.
)
- 2011-12-03 09:47:56下载
- 积分：1
-
Multi_function
01 线性调频信号的卷积功能测试（匹配）
02 LFM一维距离像
03 MATLAB联合FPGA仿真输入/输出功能测试
04 解速度模糊
05 扩展目标检测(01 LFM Test function of "conv"
02 LFM Range
03 MATLAB and FPGA
04 resovle speed resolution
05 Extended moving target)
- 2013-05-03 15:53:43下载
- 积分：1
-
用例化语句和case语句编写的全加器的VHDL描述。
用例化语句和case语句编写的全加器的VHDL描述。-Of statements were prepared using the full adder of the VHDL description.
- 2022-01-26 02:45:15下载
- 积分：1
-
these files are written in verilog but i am uploading in text format
these files are written in verilog but i am uploading in text format
- 2023-08-21 20:45:02下载
- 积分：1
-
NIOS II IDE 编程， uart_txd测试程序，仅供参考。
NIOS II IDE 编程， uart_txd测试程序，仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
- 2022-11-30 03:45:03下载
- 积分：1
-
4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率....
4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率.-4-channel 12-bit AD chip AD7862 control module, VHDL source code, suitable for single conversion sampling, 250K sampling rate.
- 2022-04-20 03:37:20下载
- 积分：1
-
Verilog写的 8 位超前进位加法器
Verilog写的 8 位超前进位加法器-Verilog write 8-bit CLA
- 2023-01-24 03:30:03下载
- 积分：1
-
atomicops_internals_mips_gcc
Protocol Buffers - Google s data interchange format.
- 2015-10-07 09:49:45下载
- 积分：1
