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vga_demo2
VGA controller : Genarate a VGA signal from your inout information as color info of each pixel
- 2010-06-24 09:26:57下载
- 积分：1
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coubter_key
ISE环境下Verilog编程实现机械按键去抖(ISE Verilog programming environment under mechanical debounces)
- 2015-12-13 12:52:42下载
- 积分：1
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mealy_sequence
实现米粒状态机
用verilog语言实现状态机的过程(Implement a state machine with a grain of rice verilog state machine language course)
- 2011-11-09 19:02:27下载
- 积分：1
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本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考....
本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
- 2022-06-29 06:12:54下载
- 积分：1
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M-ary-QAM-in
研究信道噪声对M-ary QAM的影响，适合数字通讯从业者(Effect of channel noise on M-ary QAM in)
- 2015-07-15 09:45:41下载
- 积分：1
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hilbert_m
基于FPGA的希尔伯特变化的verilog代码(Hilbert change verilog code)
- 2020-10-19 09:37:25下载
- 积分：1
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SDRAM
基于fpga与verilog语言的的sdram读写(SDRAM reading and writing based on FPGA and Verilog language)
- 2018-01-16 11:24:03下载
- 积分：1
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FPGA实现 DDS_讲的非常详细,师兄的一片论文
FPGA实现 DDS_讲的非常详细,师兄的一片论文-FPGA realize DDS_ talked about in great detail, of a senior thesis
- 2023-03-01 11:00:04下载
- 积分：1
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vhdl经典源代码――时钟设计，入门者必须掌握
vhdl经典源代码――时钟设计，入门者必须掌握-vhdl classical source code-- Clock Design, beginners must master
- 2023-05-04 10:00:03下载
- 积分：1
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Xilinx PCIcore have a detailed description of official documents, to support the...
锡林克斯巴达官方文件有详细说明，支持斯巴达、顶点
- 2022-02-27 03:33:26下载
- 积分：1
