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加减法器
可实现两个4bit补码的加法及减法，有溢出提示(adder with overflow hint)
- 2017-07-19 20:52:42下载
- 积分：1
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just division the clock into 2
just division the clock into 2
- 2022-01-26 05:48:15下载
- 积分：1
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10_ImageEdge
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像边缘提取(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image edge extraction)
- 2020-10-23 20:27:22下载
- 积分：1
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高效的同步有限状态机的设计，本代码详细的说明了如何设计高效和规范的fsm设计...
高效的同步有限状态机的设计，本代码详细的说明了如何设计高效和规范的fsm设计-Efficient Synthesizable Finite State Machine Design using NC-Verilog
- 2023-07-18 00:50:02下载
- 积分：1
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ADc
与单片机相比，用CPLD/FPGA器件更适合于直接对高速AD采样控制。本实验接口器件为ADC0809，根据ADC0809的工作时序使用CPLD产生该控制信号，CPLD启动AD转换后，得到的数据送至单片机并在PC机及数码管上显示AD转换结果。(Compared with the microcontroller, CPLD/FPGA devices more suitable for direct sampling control of high-speed AD. The interface of the experimental device for the ADC0809 ADC0809 Timing CPLD is used to generate the control signal, the CPLD to start the AD conversion, the data sent to the microcontroller and the AD conversion result on the PC and digital tube display)
- 2021-03-29 11:19:10下载
- 积分：1
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软件开发环境：ISE 7.1i
仿真环境：ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共...
软件开发环境：ISE 7.1i
仿真环境：ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共八个灯的交通灯控制器；
2. 工程在project文件夹中，双击traffic.ise文件打开工程；
3. 源文件在rtl文件夹中，traffic.v为设计文件，traffic_tb.tbw是仿真波形文件；
4. 打开工程后，在工程浏览器中选择traffic_tb.tbw，在Process View中双击“Simulation Behavioral Model”选项，进行行为仿真，即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ISE Simulator1. Realize this instance through the ISE Simulator tool to achieve a total of eight lights in both directions of traffic lights controller 2. Works project folder, double-click traffic.ise Open the project document 3. rtl source file in the folder, traffic.v for design documents, traffic_tb.tbw is the simulation waveform files 4. to open a project, the project browser, select traffic_tb.tbw, in the Process View in the double hit
- 2022-08-09 15:58:02下载
- 积分：1
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performance-of-pcie
本白皮书探讨了在PCI Express的因素
技术可能会影响性能。它还
提供指导如何估算
的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)
- 2013-10-29 10:52:43下载
- 积分：1
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JIAOTONGDENG
用VERILOG实现 交通灯控制，且运行正确，希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)
- 2014-01-05 20:38:03下载
- 积分：1
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FREEDEV数字应用开发板上的I2C总线IP核的verilog描述
FREEDEV数字应用开发板上的I2C总线IP核的verilog描述-FREEDEV digital application development board I2C bus IP core verilog description of
- 2022-03-28 16:58:18下载
- 积分：1
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通过VGA接口获取视频输出的VHDL代码
vhdl code for obtaining video output through vga port
- 2022-02-04 13:35:30下载
- 积分：1
