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93 std
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93 std
-- this design passes the Synplify synthesis check
-- download from: www.fpga.com.cn & www.pld.com.cn--- Booth Multiplier-- This file contains a ll the entity-architectures for a complete-- k- bit x k-bit Booth multiplier.-- the design mak es use of the new shift operators available in th e VHDL-93 std-- this design passes the Synplify synthesis check-- download from : www.fpga.com.cn
- 2022-02-25 16:35:00下载
- 积分：1
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行人交通灯系统设计与7段显示
- 2022-08-09 10:50:36下载
- 积分：1
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寄存器 32 位
顶级模块名称是 "_register32"。它包括许多包括 files(instance)、 _dff、 _dlatch、 和盖茨。
你可以看到整体的图表中，像 RTL 查看器后, 合成。
_register8 包含在顶部模块
- 2023-05-03 18:10:04下载
- 积分：1
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VENDTEST
此为实现第14.7.9章所需的激励文件
该代码为门级RTL描述。(Stimulus file to verify Section 14.7.9
the functionality of
gate vs. RTL description.)
- 2011-08-11 15:07:16下载
- 积分：1
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these files are written in verilog but i am uploading in text format
these files are written in verilog but i am uploading in text format
- 2022-01-26 00:53:26下载
- 积分：1
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FRUDH
用VHDL实现频率计，可测量输入脉冲的频率，并进行简单校正(Realize the frequency of use of VHDL in terms of measurable input pulse frequency, and a simple correction)
- 2008-07-07 20:13:30下载
- 积分：1
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Flash-Memory-RAM
周立功Fusion StartKit，fpga开发板的实验例程，Flash Memory初始化RAM实验(ZLG Fusion StartKit, fpga development board test routines Flash Memory Initialize RAM experiments)
- 2013-03-07 20:36:48下载
- 积分：1
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8_BUS
BUS documentation and map reffereces
- 2020-06-25 19:40:02下载
- 积分：1
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HM74YM
在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)
- 2015-05-09 11:14:17下载
- 积分：1
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Zedboard
上传的是基于Xilinx的新出的开发板Zedboard的一个简单的知道文档，希望对有关同学有所帮助。(Uploaded a simple know the document based on Xilinx' s new development board Zedboard the hope that some of the students to help.)
- 2012-12-17 15:48:11下载
- 积分：1
