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shuzishizhong
这是基于verilog hdl的数字时钟源代码，能够实现时分秒的计时，可以手动进行调时与调分。(This is based on the digital clock verilog hdl source code, can be achieved when every minute of the time, you can adjust the time manually adjusting points.)
- 2013-12-10 22:21:55下载
- 积分：1
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regress-900055
The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.
- 2013-12-27 00:29:58下载
- 积分：1
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danjibeipin
有单极倍频功能的matlab spwm逆变器(Unipolar multiplication function the the matlab spwm of inverter)
- 2012-11-04 21:07:49下载
- 积分：1
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bhaswatiml
matlab code for communication
- 2013-11-07 00:43:24下载
- 积分：1
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suoxianghuan
常用的锁相环技术，此程序是我在设计高频电路中运用的，具体见程序，经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)
- 2008-08-19 12:02:31下载
- 积分：1
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系统设计
说明： 基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)
- 2020-06-21 02:20:01下载
- 积分：1
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低功率的可逆逻辑乘8
本文提出了一种新颖的可逆乘法器。可逆逻辑可以发挥重要作用
- 2023-01-29 11:35:03下载
- 积分：1
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LCD_test
this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga
- 2013-07-25 14:43:43下载
- 积分：1
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DDR（双速率）SDRAM控制器参考设计，xilinx提供
DDR（双速率）SDRAM控制器参考设计，xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
- 2022-11-19 10:30:03下载
- 积分：1
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LVDS-application-Verilog-HDL-code
LVDS的应用的Verilog HDL例子程序(LVDS example of the application procedures for the Verilog HDL)
- 2011-09-30 20:24:02下载
- 积分：1
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