登录
首页 » VHDL » 数字密码锁

数字密码锁

于 2022-08-09 发布 文件大小:4.57 kB
0 133
下载积分: 2 下载次数: 1

代码说明:

数字密码锁的vhdl实现,包括设置密码,修改密码,报警。

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • add_noisem
    把指定的噪声叠加到信号上去.有标准噪声库NOISEX-92,其中带有白噪声、办公室噪声、工厂噪声、汽车噪声、坦克噪声等等,在信号处理中往往需要把库中的噪声叠加到信号中去,而噪声的采样频率与纯信号的采样频率往往不一致,需要采样频率的校准。 (The specified noise superimposed to the signal up. Standard noise library NOISEX-92, with white noise, office noise, factory noise, car noise, tank noise in the signal processing often requires noise to be superimposed in the library The signal to noise of the sampling frequency and pure signal sampling frequency is often inconsistent sampling frequency of calibration.)
    2012-08-10 14:18:33下载
    积分:1
  • "digital circuit EDA portal
    《数字电路EDA入门-VHDL程序实例》---交通灯程序例子-"digital circuit EDA portal-VHDL program examples"-- traffic lights procedures example
    2022-02-19 21:55:09下载
    积分:1
  • DDS_Power
    FPGA上的VERILOG语言编程。通过查找表实现直接数字频率合成。在主控部分通过键盘选择正弦波,方波,三角波,斜波,以及四种波形的任意两种的叠加,以及四种波形的叠加;通过控制频率控制字C的大小,以控制输出波形频率,实现1Hz的微调;通过地址变换实现波形相位256级可调;通过DAC0832使波形幅值256级可调;通过FPGA内部RAM实现波形存储回放;并实现了每秒100HZ扫频。(FPGA on the verilog language programming. Lookup table through direct digital frequency synthesis. In part through the control of the keyboard to choose sine, square, triangle wave, sloping wave, and four arbitrary waveform two superposed and the stack of four waveform; by controlling the frequency control word on the size, in order to control the output waveform frequency, 1 Hz to achieve the fine-tuning; Address transform through waveform phase adjustable 256; DAC0832 so through waveform amplitude adjustable 256; FPGA through internal RAM to the waveform storage intervals; and achieve a 100 per second sweep 9999.)
    2007-04-17 23:43:32下载
    积分:1
  • NIOSII I2C接口模块及驱动程序,并含有测试程序。对想开发NIOS的工程师很有帮助...
    NIOSII I2C接口模块及驱动程序,并含有测试程序。对想开发NIOS的工程师很有帮助-NIOSII I2C interface module and driver, and contains the test procedures. NIOS of engineers want to develop useful
    2022-10-02 15:40:03下载
    积分:1
  • FIR_poroje
    this project is about FIR FIlter By VHdl codes in the ISE.
    2013-09-29 19:25:16下载
    积分:1
  • 使用VHDL语言,对Altera公司的DE2开发板进行开发,本例实现了对板上7段数码管的显示,在niosiiIDE上基于硬件实现小灯的循环亮灭...
    使用VHDL语言,对Altera公司的DE2开发板进行开发,本例实现了对板上7段数码管的显示,在niosiiIDE上基于硬件实现小灯的循环亮灭-Using VHDL language, on Altera s DE2 development board for development, which in this case the realization of paragraph 7 of the on-board digital tube display, in niosiiIDE hardware implementation based on a small circle of bright lights out
    2022-03-17 06:00:39下载
    积分:1
  • Coding Styles for if Statements and case Statements
    Coding Styles for if Statements and case Statements
    2022-02-09 23:54:06下载
    积分:1
  • 布斯算法
    展位的乘法算法 is a 乘法算法两者相乘得两个签名二进制 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
    2022-10-19 10:20:03下载
    积分:1
  • 利用VHDL实现CPLD(EPM240T100C5)的串口发送程序
    利用VHDL实现CPLD(EPM240T100C5)的串口发送程序-Using VHDL realize CPLD (EPM240T100C5) Serial sending procedures
    2022-12-18 02:35:03下载
    积分:1
  • Vhdl实现的鼠标协议历程,代码可读性高,适合作为案例参考。
    Vhdl实现的鼠标协议历程,代码可读性高,适合作为案例参考。-VHDL realize the course of the mouse protocol, code readable, suitable as a reference case.
    2023-05-02 16:50:03下载
    积分:1
  • 696516资源总数
  • 106571会员总数
  • 2今日下载