-
这是一个数字时钟数字逻辑电路，整个工程包上传…
这是一个数字时钟的数字逻辑电路，整个工程打包上传，时钟可以计时、校时、整点报时、定时闹钟。使用电路图实现的。在quatarsII里面仿真的并且下载到DE2板上运行过。-This is a digital clock digital logic circuits, the whole project package upload, the clock could be time, school hours, the whole point timekeeping, timing alarm clock. The use of circuit implementation. The quatarsII inside the simulation, and downloaded to the DE2 board to run-off.
- 2022-08-06 10:22:24下载
- 积分：1
-
cpu_code_8051
vhdl code for 8051 processor
- 2010-06-25 15:16:07下载
- 积分：1
-
build synthesizer on a de2 dev fpga board
build synthesizer on a de2 dev fpga board
- 2023-07-24 00:25:04下载
- 积分：1
-
时序逻辑与组合逻辑（VHDL）
代码使用应用于 FPGA的VHDL代码，主要是告诉大家时序逻辑和组合逻辑的应用场合和区别，希望能够对大家有所帮助
- 2022-10-19 04:15:03下载
- 积分：1
-
Features: Based on the VHDL language, realize high
功能：基于VHDL语言，实现对高速A/D器件TLC5510控制-Features: Based on the VHDL language, realize high-speed A/D control devices TLC5510
- 2022-11-12 08:45:02下载
- 积分：1
-
数字信号处理的FPGA实现(第4版)源码
数字信号处理的FPGA实现(第4版)的配套源码，极具参考价值。(The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.)
- 2021-01-16 23:08:50下载
- 积分：1
-
Farrow-filter-design
两篇中文论文，详细叙述了Farrow滤波器的设计方式和理论基础，非常实用！(Two Chinese papers, described in detail Farrow filter design methods and theoretical foundation, very useful!)
- 2013-11-15 17:15:20下载
- 积分：1
-
Examples of VHDL language, including a variety of logic gate structure.
vhdl 语言实例，包括各种逻辑门的构造。-Examples of VHDL language, including a variety of logic gate structure.
- 2022-08-08 14:03:44下载
- 积分：1
-
vhdl的3
vhdl的3-8译码器-instantiate the 3-8 decoder
- 2022-03-25 00:36:10下载
- 积分：1
-
dec2_4
decoder 2-4
digital core
- 2016-05-20 03:50:28下载
- 积分：1
