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Using VHDL hardware language to achieve the top level of the IIC control procedu...
用VHDL硬件语言实现的iic顶层控制程序-Using VHDL hardware language to achieve the top level of the IIC control procedures
- 2022-12-20 20:00:08下载
- 积分:1
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MAX48_cn
MAX481、MAX483、MAX485、MAX487-MAX491以及
MAX1487是用于RS-485与RS-422通信的低功耗收发器,
每个器件中都具有一个驱动器和一个接收器(The MAX481, MAX483, MAX485 The MAX487-MAX491, and MAX1487 low-power transceivers for RS-485 and RS-422 communication, each device has a drive and a receiver)
- 2012-07-10 21:28:46下载
- 积分:1
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基于CPLD的38译码器程序设计
基于CPLD的38译码器程序设计,使用VHDL语言编程,38译码器显示在数码管上。
- 2023-03-14 08:00:04下载
- 积分:1
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电梯控制 记忆,上升下降停站 超载报警故障.....。
电梯控制 记忆,上升下降停站 超载报警故障.....。-Verilog EDA dianti
- 2023-06-16 03:50:04下载
- 积分:1
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JJ213_program
卷积码(213)的编译码,VHDL语言编写的整个工程文件,带有仿真结果图。(Convolution code (213) codec, VHDL language of the whole project file with the simulation results shown in Fig.)
- 2020-12-27 19:29:02下载
- 积分:1
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VHDL描述的简易图像缩小模块,将PAL制720×576的图片缩小为512×410,采用最近临域法,13.5MHz时钟下可实时处理PAL视频。...
VHDL描述的简易图像缩小模块,将PAL制720×576的图片缩小为512×410,采用最近临域法,13.5MHz时钟下可实时处理PAL视频。-VHDL description of a simple image to narrow the module, will be PAL system of 720 × 576 image reduced to 512 × 410, using the recent Pro-domain method, 13.5MHz clock can handle PAL video in real time.
- 2022-06-11 23:09:14下载
- 积分:1
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adc0809ctrl
用fpga芯片使用vhdl语言对AD转换芯片ADC0809进行控制(Using the fpga chip use language of VHDL AD transform chip ADC0809 control)
- 2011-12-12 16:31:59下载
- 积分:1
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tb_modular
Matlab to hdl code for Least_square testbench
- 2020-06-17 12:20:02下载
- 积分:1
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Altera的CycloneIII Start Board,使用的PFGA是3C25,包括原理图和PCB,用Cadence Allegro打开...
Altera的CycloneIII Start Board,使用的PFGA是3C25,包括原理图和PCB,用Cadence Allegro打开-Altera
- 2022-10-05 01:50:03下载
- 积分:1
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ISPPCBforFPGA
Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB(Xilinx, Altera, ARM, AVR, S52, Lattice series FPGA download cable circuit diagram and PCB)
- 2009-12-14 16:55:35下载
- 积分:1