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pidd
VERILOG HDL pid算法 带仿真验证(pid by verilog HDL)
- 2020-11-13 10:09:43下载
- 积分：1
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SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。...
SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
- 2023-07-19 13:10:03下载
- 积分：1
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DDS
DDS的VHDL源代码，是数字QPSK调制解调中的重要组成部分。(DDS of the VHDL source code, the number of QPSK modulation and demodulation is an important part.)
- 2007-12-11 16:26:33下载
- 积分：1
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FPGA_PSK
可以实现2PSK的信号调制，已经过Modelsim波形仿真(It can realize 2PSK signal modulation and has been simulated by Modelsim waveform.)
- 2019-05-09 16:29:17下载
- 积分：1
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UART0407
ise平台模拟UART，并与PC机实现收发（+1）(ISE platform simulation UART and transceiver.)
- 2013-04-22 15:38:36下载
- 积分：1
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FPGA VERILOG 用DCFIFO实现 跨时钟域的数据传输，已验证，直接可用...
FPGA VERILOG 用DCFIFO实现 跨时钟域的数据传输，已验证，直接可用-FPGA VERILOG using DCFIFO realize cross-clock domain data transfer, has been verified, directly available
- 2022-04-17 14:15:55下载
- 积分：1
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CAN--for-FPGA
FPGA控制SJA1000实现CAN协议 适合深入学子FPGA的学生 很不错(FPGA control the SJA1000 CAN protocol for in-depth realization of the students are very good students FPGA)
- 2011-04-19 18:51:12下载
- 积分：1
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主要介绍了ＦＰＧＡ设计的基本原则、基本设计思想、基本操作技巧、常用模块。...
主要介绍了ＦＰＧＡ设计的基本原则、基本设计思想、基本操作技巧、常用模块。-Mainly introduces the basic principles of FPGA design, basic design concepts, basic operating skills, commonly used modules.
- 2022-08-25 13:03:15下载
- 积分：1
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电梯控制器程序设计与仿真的vhdl源代码
电梯控制器程序设计与仿真的vhdl源代码-Elevator controller design and simulation of vhdl source code
- 2022-04-08 14:05:19下载
- 积分：1
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M_M
此为数学形态滤波器消燥的代码，用于一维信号，涉及一个具体的例子，需要的话可以自己修改，修改相应的结构元素。(This is a mathematical morphology filter away dry code, used to one dimensional signal, involving a concrete example, necessary can change ourselves, change the structure of the corresponding elements)
- 2013-08-29 21:36:37下载
- 积分：1
