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行人交通灯系统设计与7段显示
- 2022-08-09 10:50:36下载
- 积分：1
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this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100...
this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
-this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
- 2022-07-15 18:56:36下载
- 积分：1
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disparity
Disparity mapp code in VHDL
- 2017-11-30 14:48:59下载
- 积分：1
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SimpleVOut-master
说明： SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals
in various formats. The cores connect using AXI-streams. Most configurations
(resolution, framerate, colordepth, etc.) are set at compile-time using
Verilog parameters. See svo_defines.vh for details on those parameters.
- 2020-06-24 21:20:01下载
- 积分：1
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GAL16V8(fangzhen74LS138)
GAL16V8(仿真74LS138),试验通过。包括able及jed文件。对pcb印板设计时，对简化走线特别有用。简单的修改GAL16V8程序，可灵活地进行地址译码修改。(GAL16V8 (simulation 74LS138), test passed. Including the able and jed file. Printed on the pcb board design, especially useful to simplify alignment. Simple modifications GAL16V8 program, the flexibility to change the address decoding.)
- 2011-01-26 20:43:01下载
- 积分：1
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e_BIU
说明： isa MEMORY PLAN eu biu asm
- 2020-06-25 19:20:02下载
- 积分：1
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Center
使用Xilinx3S400开发的钢板检测算法中心化算法，通过测试。(a vhdl-program use Xilinx3S400)
- 2009-04-12 22:09:45下载
- 积分：1
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altera de2 开发板 vga lcd控制quatus 工程
altera de2 开发板 vga lcd控制quatus 工程-altera de2 board vga lcd control quatus works
- 2023-05-15 10:55:03下载
- 积分：1
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QAM16_demo
This is a demonstration for 16QAM. It is a Simulink model, including hardware implementation on Xilinx FPGA for adaptive equalizer and carrier recovery.
- 2010-11-09 03:00:52下载
- 积分：1
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FPGA控制AD7321的模块
FPGA控制AD7321的模块，是本人亲自试验过的。有Verilog源码，和简单文档(Fpga control module of ad 7321, is I personally tested. Verilog source code, and simple documentation)
- 2018-01-31 20:04:27下载
- 积分：1
