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3he11
产生SH,SP,RS,SP,φ1,φ2驱动脉冲,用于驱动TCD1501的的源代码(To generate SH, SP, RS, SP, φ1, φ2 drive pulse for driving TCD1501 source code)
- 2013-05-15 20:50:30下载
- 积分:1
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digital-processing-with-FPGA
vhdl语言,国外教材,数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)
- 2016-07-22 21:53:49下载
- 积分:1
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fft
说明: 用FPGA实现8点fft,整个代码使用verilog编写,主要运用了加法器和乘法器,简单易懂(8-point FFT with FPGA, The whole code is written by Verilog, mainly using adder and multiplier, which is easy to understand)
- 2021-03-29 20:59:10下载
- 积分:1
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f500
verilog coding for butterworth filter with cut off
frequency with 500hz
- 2014-02-19 15:37:09下载
- 积分:1
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DE2
DE2-70,NIOS reference file,
- 2022-02-01 13:58:03下载
- 积分:1
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aaa
这是一些小代码的集合
希望能对大家有所帮助(This is a collection of some small code for all of us hope to be helpful)
- 2007-11-16 06:19:33下载
- 积分:1
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不错的介绍verilog的电子文档,对于入门级的新手有不错的参考价值...
不错的介绍verilog的电子文档,对于入门级的新手有不错的参考价值-A good introduction to verilog electronic documents, for the novice there is a good entry-level reference value
- 2023-03-11 23:45:04下载
- 积分:1
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fft_8
基二8点fftverilog实现。经过modelsim仿真通过(Base 2 fftverilog implementation at 8 o clock. Go through the modelsim simulation)
- 2021-02-21 16:49:42下载
- 积分:1
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mc8051内核,VHDL程序,内有说明,超详细.
mc8051内核,VHDL程序,内有说明,超详细.-mc8051 kernel, VHDL program, which has made it clear, super-detailed.
- 2022-07-04 05:44:07下载
- 积分:1
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DDS_DAC_Output
说明: 本工程使用A7系列FPGA产生DDS,用DAC0832进行正弦电压输出(In this project, A7 series FPGA is used to generate DDS, and DAC0832 is used for sinusoidal voltage output)
- 2019-05-06 10:05:10下载
- 积分:1