-
XILINX FPGA on internal training materials in Chinese
关于XILINX FPGA
内部
中文培训教材-XILINX FPGA on internal training materials in Chinese
- 2022-05-22 03:01:00下载
- 积分:1
-
11-07-11
AD9910实现脉冲内线性调频信号,仅供参考(AD9910 to achieve linear FM pulse signal, for reference only)
- 2013-09-16 10:52:00下载
- 积分:1
-
HDB3
HDB3码在matlab中的仿真,包括原始码、AMI码及HDB码的相关仿真图形(HDB simulink in matlab)
- 2020-07-04 19:40:02下载
- 积分:1
-
sample_SPI
这是一个瑞萨R78/G13的SPI演示程序,详细的放置了说明,很有用的源码(This is one of the SPI Renesas R78/G13 demonstration program, placed a detailed description of very useful source)
- 2013-09-03 02:59:19下载
- 积分:1
-
telephone-cost-metering
该程序用来实现电话计时以算取费用,比较简单(telephone cost metering verilog code)
- 2013-11-03 19:45:00下载
- 积分:1
-
(2,1,9)卷积编解码器,译码部分采用Vitebi译码算法,设计使用Verilog HDL语言,在Modelsim平台下仿真通过
(2,1,9)卷积编解码器,译码部分采用Vitebi译码算法,设计使用Verilog HDL语言,在Modelsim平台下仿真通过-(2,1,9) convolutional codec, decoding part decoding algorithm used Vitebi design using Verilog HDL language simulation in ModelSim platform through
- 2022-05-25 02:39:25下载
- 积分:1
-
VHDL design language based on 8
基于VHDL语言的设计8位CISC微处理器实例-VHDL design language based on 8-bit CISC microprocessor examples
- 2023-06-06 01:10:04下载
- 积分:1
-
serial_adder
串行加法器的vhdl描述,用两个移位寄存器和一个全加器,一个d触发器实现(The VHDL description of the serial adder, with two shift registers and a full adder, a D trigger)
- 2020-11-10 21:19:46下载
- 积分:1
-
basic_cpu_mano_ise_vhdl
morris mano basic vhdl code in ise
- 2014-01-13 05:52:01下载
- 积分:1
-
总结设计中的重点及注意的地方,常出现错误的地方等。
总结设计中的重点及注意的地方,常出现错误的地方等。-Summarize the design of the focus and attention of local, often the wrong place and so on.
- 2022-08-24 04:12:36下载
- 积分:1