可直接用于zedboard上的串口通信，利用zynq7000的pl部分实现一个简单的UART串口通信(Can be used directly on the zedboard serial communication, the use of zynq7000 PL part of the realization of a simple UART serial communication)

VHDL语言编程简单实例若干，适合于初学者(VHDL language programming simple example, suitable for beginners)

全数字锁相环的verilog源代码-全数字锁相环的verilog源代码

数字锁相环 dpll的 编译通过,使用verilog HDL语言对锁相环进行基于FPGA的全数字系统设计,以及对其性能进行分析和计算机仿真的具体方法(Digital phase-locked loop dpll compiler through the use of verilog HDL language on the phase-locked loop FPGA-based digital system design, as well as its performance analysis and computer simulation of specific methods)

详细说明：基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序，EccErrLoc文件夹为ECC错误定位程序。

This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.

说明：  用于FPGA的I2S接收模块，仅供学习和参考(audio-i2s receive.use fpga.)

VIP FPGA板的配套例子，这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)

说明：  多摩川绝对值编码器的NRG协议源代码,我们公司用的，我修改的解码程序(Tamagawa NRG absolute encoder protocol source code, used by our company, I modified decoding process)

program send sms by sim900 module