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FM radio decoder and controller VHDL, Xilinx provide. I thank other.
FM收音机的解码及控制器VHDL语言实现,Xilinx提供的.别谢我.-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
- 2022-10-05 04:50:03下载
- 积分:1
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axi_master
DDR3 控制器,axi4_full 模式, burst长度为16,应用于xilinx平台。(DDR3 interface controller, axi4_full working mode with burst length 16, can operate on the xilinx platform.)
- 2017-05-16 11:26:28下载
- 积分:1
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Opencore的IP Core,有实际合成过,可以用,大家参考
Opencore的IP Core,有实际合成过,可以用,大家参考-Opencore of the IP Core, there is a practical synthesis that we could use, we refer to see
- 2022-01-22 05:22:44下载
- 积分:1
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4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率....
4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率.-4-channel 12-bit AD chip AD7862 control module, VHDL source code, suitable for single conversion sampling, 250K sampling rate.
- 2022-04-20 03:37:20下载
- 积分:1
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Verilog-example-by-xiayuwen
这本书是夏宇文老师在几年前编写的,非常是和初学者,里面有哦对verilog 的详细讲解(a book write by xiyuwen ,This book provides a detailed explanation of verilog )
- 2012-01-03 19:02:58下载
- 积分:1
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用VHDL语言编写的代码,以供大家学习和交流,方便大家学习!...
用VHDL语言编写的代码,以供大家学习和交流,方便大家学习!-prepared using VHDL code for all to study and exchange to facilitate learning!
- 2022-02-04 03:08:53下载
- 积分:1
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verilog例子,有130多个,值得参考,新手很有帮助
verilog例子,有130多个,值得参考,新手很有帮助-Verilog example, there are more than 130, it is also useful, very helpful to novice
- 2022-10-14 23:55:03下载
- 积分:1
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自己写得一个关于sine(32X24)的程序
自己写得一个关于sine(32X24)的程序-own written on a sine (32X24) procedures
- 2022-02-28 22:21:58下载
- 积分:1
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DDS_DAC_Output
说明: 本工程使用A7系列FPGA产生DDS,用DAC0832进行正弦电压输出(In this project, A7 series FPGA is used to generate DDS, and DAC0832 is used for sinusoidal voltage output)
- 2019-05-06 10:05:10下载
- 积分:1
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用VHDL语言实现的LDPC码的硬件语言实现,对比验证…
用VHDL语言编写的LDPC码硬件实现语言,相对于verilog的,比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple
- 2023-05-19 11:55:03下载
- 积分:1