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8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation....
8051的内核(vhdl)
This is version 1.1. of the MC8051 IP core. 在FPGA上运行.供有精力的人研究.-8051 kernel (vhdl) This is version 1.1. Of the M C8051 IP core. FPGA operation. have the energy for the study.
- 2022-03-03 01:17:14下载
- 积分:1
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Code
用于数字积分器的设计,主要涉及VHDL、Verilog等FPGA编程语言。(Design of Digital Integrator)
- 2011-11-23 21:31:03下载
- 积分:1
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Vhdl实现的鼠标协议历程,代码可读性高,适合作为案例参考。
Vhdl实现的鼠标协议历程,代码可读性高,适合作为案例参考。-VHDL realize the course of the mouse protocol, code readable, suitable as a reference case.
- 2023-05-02 16:50:03下载
- 积分:1
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4x4-Keypad
fpga的一个小程序用于3s500e 4*4键盘模块(fpga is a small program used 3s500e 4* 4 keyboard module)
- 2013-07-21 11:41:36下载
- 积分:1
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用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有...
用vhdl来实现的数字频率合成的技术,几乎很全的,所有的都有 -Use VHDL to realize the digital frequency synthesis technology, almost the whole of, all have
- 2022-02-04 17:07:58下载
- 积分:1
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我用过的verilog hdl写的SDRAM core源程序,经过测试应用
我用过的verilog hdl写的SDRAM core源程序,经过测试应用-I used to write Verilog HDL source of SDRAM core, the test application
- 2022-01-23 10:44:34下载
- 积分:1
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功率门控IEEE论文可为IP核的实现充分利用
ieee paper on power gating and can be use full for implementing on ip core
- 2022-02-03 18:58:04下载
- 积分:1
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该程序实现的N位全减器,首先实现一位的减法器,之后实现N位全减器。...
该程序实现的N位全减器,首先实现一位的减法器,之后实现N位全减器。-Program of the N-bit-wide reduction, the first realization of a subtraction for, after all N-reduction devices.
- 2022-02-25 19:13:43下载
- 积分:1
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beep
用VHDL语言实现的蜂鸣器发声程序,当按下不同按键时,发出不同频率的声音(Function:when different buttens are pressed, beep will play sound with different frequency.
laguage:VHDL)
- 2021-04-25 22:58:46下载
- 积分:1
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Writing-Testbenches-using-System-Verilog
writing testbench in system verilog
- 2011-12-11 06:02:47下载
- 积分:1