-
verilog
数字信号除了的FPGA实现的Verilog源代码，之前发过一份是VHDL，各有所需吧，需要的看看吧(Digital signal in addition to the realization of the FPGA Verilog source code, send before a is VHDL, each have need it, need to look at it
)
- 2012-02-25 15:06:35下载
- 积分：1
-
wishbone 源代码，opencore
wishbone 源代码，opencore-wishbone source code, opencore
- 2022-05-13 00:28:04下载
- 积分：1
-
PL_2FSK
基于VHDl的2FSK调制！用的是altera的quartus11软件(Based on VHDl the 2FSK modulation)
- 2012-12-13 17:20:54下载
- 积分：1
-
scia_loopback_interrupts
TI F28027 SCI 源码，中断，FIFO，LoopBack使能(TI F28027 SCI source code, interrupt, FIFO and Loopback enalbe)
- 2020-11-18 15:29:40下载
- 积分：1
-
自已写的一个16X16的乘法器，速度比较慢。初学者练习练习！
自已写的一个16X16的乘法器，速度比较慢。初学者练习练习！-own writing an audio Multiplier, speed is relatively slow. Beginners practice practice!
- 2022-07-02 12:25:49下载
- 积分：1
-
Program to implement convolution through VHDL
Program to implement convolution through VHDL-Program to implement convolution through VHDL...
- 2023-02-08 06:15:02下载
- 积分：1
-
agc
数字自动增益控制 AGC （automatic gain control） Verilog(automatic gain control Verilog)
- 2021-03-11 19:29:25下载
- 积分：1
-
This is the FPGA, a simple routine, LED keyboard display program, very time we s...
这是FPGA的一个简单例程，LED键盘显示程序，非常时候大家入门学习-This is the FPGA, a simple routine, LED keyboard display program, very time we started to learn
- 2022-06-18 21:18:24下载
- 积分：1
-
RISC(精简指令集计算机)存储程序状态机的源代码
RISC(精简指令集计算机)存储程序状态机的源代码-RISC (reduced instruction set computer) stored procedures source code of the state machine
- 2022-06-30 22:23:03下载
- 积分：1
-
基于basys2的四位有符号二进数除法
基于diligent公司的basys2开发板的四位有符号二进制数的除法
- 2023-08-01 03:30:03下载
- 积分：1
