-
1
说明： matlab code for JTAG cable checking
- 2014-02-04 19:27:39下载
- 积分：1
-
This is the design of the divider module EDA. Can achieve three different freque...
此为EDA设计的分频器模块。可以实现三种不同的频率信号，可以通过使用者自由设置频率大小-This is the design of the divider module EDA. Can achieve three different frequency signals, users can freely set the frequency of the size of
- 2022-07-22 16:48:57下载
- 积分：1
-
Verilog module containing a synthesizable CRC function
//* polynomial: (0 1 8)...
Verilog module containing a synthesizable CRC function
// * polynomial: (0 1 8)
// * data width: 8-Verilog module containing a synthesizable CRC function
//* polynomial: (0 1 8)
//* data width: 8
- 2022-08-18 21:19:43下载
- 积分：1
-
jpeg_fpga
基于FPGA的JPEG解码，对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)
- 2014-02-24 09:19:22下载
- 积分：1
-
一个cpu的vhdl语言程序。非常好的
一个cpu的vhdl语言程序。非常好的...
一个cpu的vhdl语言程序。非常好的
一个cpu的vhdl语言程序。非常好的-A cpu of the VHDL language program. A very good cpu the VHDL language program. Very good
- 2022-03-24 08:58:44下载
- 积分：1
-
bitcount
it will count the bit
- 2010-03-13 23:53:26下载
- 积分：1
-
445.FPGA CNN
说明： vhdl cnn 您的帐号尚未开通，请上传编程资料开通或在线付费马上开通(vhdl cnnCategory: verilog All Download: FPGA_Based_CNN-master.zipSize:2.30 MB FavoriteFavorite Preview code View comments Description family:-app...)
- 2020-02-08 11:45:08下载
- 积分：1
-
jiecheng
利用Verilog语言中的函数调用实现阶乘运算的功能(Function calls use Verilog language implementation of the factorial function computing)
- 2016-05-16 21:01:23下载
- 积分：1
-
asynchronous-fifo
同步fifo的调用程序，调用Quartus II 9.0 (32-Bit)中的fifo模块(Synchronous fifo calling program, call Quartus II 9.0 (32-Bit) in fifo module)
- 2013-08-23 21:58:56下载
- 积分：1
-
改变盒FPGA DE2
Alter kit FPGA de2-35
This project shows a cascade motion through board leds.-Alter kit FPGA de2-35
This project shows a cascade motion through board leds.
- 2022-03-06 03:51:32下载
- 积分：1
