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fjq1
介绍了在数字语音通信中, 利用在系统可编程技术和复杂可编程逻辑器件CPLD, 实现了数字语音的复接和分接
对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。实际应用结果表明, 系统工作稳
定可靠, 设计是成功的。(Describes the digital voice communications, the use of in-system programmable technical and complex programmable logic device CPLD, to achieve the digital voice multiplexer and demultiplexer for the single steady state in which the digital circuit and digital phase locked loop extraction bit synchronization signals are also carried out a detailed design specification. The practical application results show that the system works stable and reliable design is successful.)
- 2020-12-01 10:39:28下载
- 积分:1
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应用VHDL语言将高稳晶振分频得到1pps,使用GPS的1pps信号作为触发...
应用VHDL语言将高稳晶振分频得到1pps,使用GPS的1pps信号作为触发-Application of VHDL language high stability crystal oscillator frequency to be 1pps, the use of GPS signals as a trigger of 1pps
- 2022-05-12 21:39:28下载
- 积分:1
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基于VHDL语言的解码汉明编码,其中包含子
基于VHDL语言的汉明码的译码,含有校正子跟纠错检错功能-Based on the VHDL language decoding Hamming Code, which contains sub-calibration error with error correction function
- 2022-08-11 19:51:06下载
- 积分:1
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pj2-NO.6
基于FPGA的电子密码锁设计-已在开发板上成功运行,通过老师检验。(FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.)
- 2017-05-26 11:54:44下载
- 积分:1
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UART
UART文件 包括发送器 接收器 fifo 测试文件(UART file includes a receiver transmitter fifo test files)
- 2016-06-06 20:35:02下载
- 积分:1
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电子表,实现计时记分计秒的功能,同时可以对时分秒进行校正,实现调时功能。...
电子表,实现计时记分计秒的功能,同时可以对时分秒进行校正,实现调时功能。-Electronic watches, time points of dollars to achieve a second function, at the same time when the minutes and seconds can be calibrated to achieve when the transfer function.
- 2022-06-03 13:45:21下载
- 积分:1
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一个模拟ISA界面的简易小程式,简单易懂
一个模拟ISA界面的简易小程式,简单易懂-ISA interface, a simple simulation of a small program, easy-to-read
- 2022-07-24 01:55:08下载
- 积分:1
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犯错
KX_DVP3F型FPGA应用板/开发板(全套)包括:
CycloneII系列FPGA EP2C8Q208C8 40万们,含20M-270MHz锁相环2个。
RS232串行接口;VGA视频口
高速SRAM 512KB。可用于语音处理,NiosII运行等。
配置Flash EPCS2, 10万次烧写周期 。
isp单片机T89S8253:MCS51兼容单片机,12KB在系统可编程Flash ROM,10万次烧
写周期;2KB在系统可编程EEPROM,10万次烧写周期;2.7V-5.5V工作电压;0-24MHz
工作时钟;
2数码管显示器、20MHz时钟源(可通过FPGA中的锁相环倍频);
液晶显示屏(20字X4行);
工作电源5V、3.3V、1.2V混合电压源,良好电磁兼容性主板。
配套示例程序、资料、编程软件光盘等。
4X4键盘,4普通按键,8可锁按键,8发光管
BlasterMV编程下载器和并口通信线,可完成FPGA编程下载和isp单片机的编程。KX_DV3F开发板的源程序-err
- 2022-02-10 08:39:49下载
- 积分:1
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Design-Compiler-Reference
dc的应用规范,以及一些基础的操作指导,注意事项等(dc application specification, as well as some basic instructions, precautions, etc.)
- 2013-08-13 11:14:47下载
- 积分:1
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dds正弦发生器代码
讲述了dds直接数字频率合成的基本原理,同时用VHDL语言编写dds原代码用于生成正弦波,并在ISE开发平台进行仿真和MATLAB验证正弦波输出结果(described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for simulation and verification MATLAB sine wave output)
- 2005-04-21 08:04:15下载
- 积分:1