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HuaWeiVerilog
主要用来介绍如何编写高质量的verilog程序的(Is mainly used to describes how to write high-quality verilog programs)
- 2020-09-18 09:07:55下载
- 积分：1
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EMAC6
verilog实现的FPGA三态以太网链路层通信代码，里面有状态机，并按各个模块的功能分了文件夹，还有说明文档，自定义帧的产生和接收，开发环境为Xilinx ISE，测试无误。(verilog realization FPGA Tri-Mode Ethernet link layer communication code, which the state machine, according to the function of each module sub folder, as well as documentation, self-defined frame generation and reception, the development environment for the Xilinx ISEtest and correct.)
- 2013-01-09 00:04:20下载
- 积分：1
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RSA密码芯片的FPGA实现[1].part1.rar
RSA密码芯片的FPGA实现[1].part1.rar...
RSA密码芯片的FPGA实现[1].part1.rar
RSA密码芯片的FPGA实现[1].part1.rar-RSA password chip FPGA realization of [1]. Part1.rarRSA password chip FPGA realization of [1]. Part1.rar
- 2022-08-13 06:54:28下载
- 积分：1
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VHDL出租车计费代码
该代码实现出租车计费功能，例如起步价为5元，按住相关控件后，每隔五秒，计数将加1，实现类似于开车时计费的功能，当松开按键后，计费也将停止。。。。
- 2022-02-14 00:52:30下载
- 积分：1
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实现LMS的VHDL代码。
Implement LMS vhdl code.
- 2022-07-11 07:46:06下载
- 积分：1
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rfid new code
说明： In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.
- 2019-04-30 16:54:27下载
- 积分：1
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SPI
design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.(design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.)
- 2010-08-17 19:16:12下载
- 积分：1
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_2FFT Algorithm
基_2FFT算法的FPGA设计与实现，适合做fpga的工程技术人员参考及设计-_2FFT Algorithm-based FPGA Design and Implementation for fpga to do engineering and design reference
- 2022-09-14 12:40:03下载
- 积分：1
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infrared_receive
红外接收处理，根据外部波形记录波形的高低电平时间，从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)
- 2013-09-27 11:09:02下载
- 积分：1
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DIGITAL-PID
Use verilog language design DIGITAL-PID source
- 2016-12-26 09:41:15下载
- 积分：1
