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cic_dec_8_five
CIC抽取滤波器，抽取系数8,verilog版本，用于数字下变频(CIC decimation filter, extraction coefficient of 8, verilog version, for digital down-conversion)
- 2010-03-02 12:53:31下载
- 积分：1
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THU微纳电子系ic设计课程大作业CNN
说明： THU微纳电子系ic设计课程大作业，使用verilog实现CNN加速器，含一层卷积和池化，仿真通过。(a CNN accelerator written in VerilogHDL, including one conv layer and one pooling layer, simulation passed)
- 2020-07-06 20:18:57下载
- 积分：1
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FPGA设计软件的绝佳入门书籍，本人珍藏，全部吐血奉献之2，请大家赶紧下！...
FPGA设计软件的绝佳入门书籍，本人珍藏，全部吐血奉献之2，请大家赶紧下！-FPGA design software, an excellent entry-books, I treasure all the blood sacrifice of 2, please hurry under the U.S.!
- 2022-07-17 20:40:02下载
- 积分：1
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High
高速多通道crc实现，可以并行实现5个通道数据的校验，支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard
- 2022-07-18 13:13:37下载
- 积分：1
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verilog 代码
基于FPGA的VERILOG语言的DS18B20温度检测程序，代码自测可用(FPGA based VERILOG language DS18B20 temperature detection program, code self test available)
- 2018-07-05 15:36:01下载
- 积分：1
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22_deadlock
说明： 本例的源描述超过了演示版限制的300行,
如果您需要对其进行编译与模拟,请与北京理工大学
ASIC研究所联系,获取Talent系统的完全版本.
联系方法:
电话:010-68912434
(The source described in this case than the demo version of the 300 line limit, if you need to be compiled with the simulation, please contact ASIC Institute of Beijing Institute of Technology to obtain the complete version of Talent system. Contact: Tel :010-68912434)
- 2008-09-09 18:11:58下载
- 积分：1
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可编程逻辑器件实验
运用VHDL语言编写的检测1111的序列检测代码和加法器，运用verlog语言的交通灯，流水灯，出租车自动计费器等
- 2022-07-17 23:42:22下载
- 积分：1
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eDP
eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分：1
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wcdma_reciever
本代码仿真了WCDMA小区搜索。cell_search_cpich scramble wcdmasource(This code emulation WCDMA cell search. cell_search_cpich scramble wcdmasource)
- 2020-11-24 16:39:34下载
- 积分：1
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Use Quartus in LCM display static graphics palace
运用Quartus在LCM中显示静态宫殿图形-Use Quartus in LCM display static graphics palace
- 2023-04-14 02:55:03下载
- 积分：1
