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FPGA使用Xilinx复位
Xilinx FPGA reset usage
- 2022-02-01 16:18:58下载
- 积分：1
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32_lvds_test
Xilinx 公司Spartan-6系列FPGA实现LVDS，带Modelsim仿真文件，已综合。(Xilinx Spartan-6 Series FPGA implements LVDS with Modelsim simulation file, which has been synthesized.)
- 2020-11-30 20:59:27下载
- 积分：1
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20190717 - Copy
this describes building spi block on verilog hdl and programming them on an fpga device
- 2020-06-21 21:40:02下载
- 积分：1
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8.4-ADC0809-VHDL-control-program
基于VHDL语言，实现对ADC0809简单控制(Based on VHDL language, to achieve the ADC0809 simple control)
- 2011-11-29 08:43:07下载
- 积分：1
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niossram
altera fpga ep3c25器件微处理器开发，niosii+sram, 已编译通过，可直接下载到开发板(altera fpga ep3c25 the development of microprocessor devices, niosii+ sram, compiled through, can be directly downloaded to the development board)
- 2009-04-13 13:26:42下载
- 积分：1
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基于VHDL的自动售货机实现,包含完整的源代码,锁脚文件以及下载文件
基于VHDL的自动售货机实现,包含完整的源代码,锁脚文件以及下载文件-VHDL-based vending machine realize that contains the complete source code, locking pin, as well as download files documents
- 2022-07-09 00:04:25下载
- 积分：1
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EP3C16_Nios_MMA7455
实现基于NIOS的 EP3C16与加速度传感器NMA7455的IIC基本通信(Realization of based on NIOS EP3C16 and acceleration sensor NMA7455 IIC of basic communication
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- 2013-01-29 13:22:50下载
- 积分：1
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4位电子密码锁，带键盘扫描、按键防抖动、LCD驱动编译码
4位电子密码锁，带键盘扫描、按键防抖动、LCD驱动编译码-four electronic password lock with a keyboard scan button shake, LCD driver encryption
- 2022-05-10 17:31:17下载
- 积分：1
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vhdl+verilog
小波提升算法源码，里面一个txt文件可以当作算法参考；(Wavelet lifting algorithm source code, inside a TXT file can be used as algorithm reference;)
- 2018-06-20 09:28:28下载
- 积分：1
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VHDL编写的数字钟，在Q
VHDL编写的数字钟，在Q-ii下编译，实现闹铃设置与定时闹铃，分时秒显示-VHDL prepared digital clock, in the Q-ii under the compiler to achieve regular alarm and alarm settings, time-seconds display
- 2022-12-10 02:20:03下载
- 积分：1
