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codeloc1k
说明： 实现电子密码锁的各项功能,经过编译和仿真(Electronic code lock of the function, the compiler and simulation)
- 2008-11-09 21:24:14下载
- 积分：1
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等精度测频??
说明： 等精度测频法，有需要的可以下载看看哟，word中包含的代码(Equal Precision Frequency Measurement Method)
- 2020-06-22 11:00:01下载
- 积分：1
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该代码在信令模块MK50H27 CPLD第七满足（Xilinx 95144）罗…
该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.
- 2023-05-01 09:05:04下载
- 积分：1
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Verilog liushuideng shanshuodeng乘虚
verilog实现闪烁灯和流水灯dechengxu-verilog liushuideng shanshuodeng chengxu
- 2022-06-18 10:08:00下载
- 积分：1
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attachments_2010_01_29
dct and idct vhdl code
- 2010-03-24 23:08:41下载
- 积分：1
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reference
早迟门（early late gate），比特同步算法，该文档详细的说明了早迟门算法的原理以及具体的实现步骤(Early late gate (early late gate), bit synchronization algorithm, the document explains in detail the principles of early-late gate method and the specific implementation steps)
- 2015-04-30 15:06:04下载
- 积分：1
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This application note explains the process of eveloping and debugging a hardware...
This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.-This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.
- 2022-01-23 11:16:04下载
- 积分：1
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CH2 VHDL 数字电路参考书所有程序2
CH2 VHDL 数字电路参考书所有程序2-CH2 VHDL digital circuit two reference books all procedures
- 2022-01-26 01:59:56下载
- 积分：1
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vhdl
vhdl表示与综合，原书第二版，中文版，比较全，用超星打开-vhdl
- 2023-05-18 10:30:04下载
- 积分：1
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square_syn
说明： 平方环载波同步法FPGA实现的verilog代码(square loop carrier wave syn)
- 2021-03-04 23:59:32下载
- 积分：1
