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潘松编写的EDA书籍!学习FPGA的好帮手!
潘松编写的EDA书籍!学习FPGA的好帮手!-Pinson prepared by the EDA books! Learning FPGA a good helper!
- 2023-01-24 08:30:05下载
- 积分:1
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使用vriloge硬件描述语言设计数字频率计,其对于高频测量精确,可测范围0―99999999HZ,在MAX+PLUSII中运行通过并在实验箱上运行通过达到要求...
使用vriloge硬件描述语言设计数字频率计,其对于高频测量精确,可测范围0―99999999HZ,在MAX+PLUSII中运行通过并在实验箱上运行通过达到要求-The use of hardware description language design vriloge digital frequency meter, and its high-frequency measurement for accurate, range 0-99999999HZ, in MAX+ PLUSII run me through and run the experiment to meet the requirement through
- 2022-01-25 18:01:01下载
- 积分:1
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write VHDL 8051 kernel, available, convenient, can be downloaded interested in t...
VHDL写的8051内核,可用的,好用,有兴趣可下载,在外国网站下载的-write VHDL 8051 kernel, available, convenient, can be downloaded interested in the foreign website
- 2022-01-25 17:39:39下载
- 积分:1
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counter4b
Vivado同步计数器VHDL设计 具有异步复位和同步预置数功能 同步计数器同步计数器同步计数器(The Vivado synchronous counter VHDL is designed with asynchronous reset and synchronous preset function, synchronous counter, synchronous counter and synchronous counter.)
- 2021-03-26 14:29:13下载
- 积分:1
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moore 状态机的一个简单的事例,初学者很好的地实例!
moore 状态机的一个简单的事例,初学者很好的地实例!-moore state machine of a simple example for beginners to very good example!
- 2022-08-03 06:34:52下载
- 积分:1
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dds
DDS实验 matlab 与quartus 的完美结合(DDS experimental combination of matlab and quartus)
- 2010-05-08 08:51:48下载
- 积分:1
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用VHDL语言编写的一个控制程序,主要功能是输入码同步,输出字和帧信号...
用VHDL语言编写的一个控制程序,主要功能是输入码同步,输出字和帧信号-VHDL language using a control program, the main function is to input code synchronization, and frame signals output word
- 2023-04-27 22:40:03下载
- 积分:1
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用FPGA 是先键盘的程序,is good for you
用FPGA 是先键盘的程序,is good for you -FPGA is the first keyboard to use the procedure, is good for you
- 2023-08-22 22:30:03下载
- 积分:1
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gtx_interface_ip
高速串行设计FPGA-GTX IP设置生成,可动态配置速率2.4Gbps,1.2Gbps,0.6Gbps,自适应链接(High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link)
- 2016-09-22 09:48:00下载
- 积分:1
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FPGA-DSP
vhdl编写的FPGA与DSP接口程序,在FPGA内分配了两块双BUFFER与DSP进行通信(vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP)
- 2021-01-08 10:58:51下载
- 积分:1