-
FPGA实现Jpeg压缩,和视频采集程序
说明: FPGA实现Jpeg压缩,和视频采集程序(Zynq - Main - register access Mio)
- 2020-03-13 23:25:40下载
- 积分:1
-
用FPGA实现的VGA接口程序,采用的语言是VHDL硬件描述语言,大家可以参照下看看采用的器件是Altera EP2c35...
用FPGA实现的VGA接口程序,采用的语言是VHDL硬件描述语言,大家可以参照下看看采用的器件是Altera EP2c35-Using FPGA to achieve the VGA interface program, the language used is VHDL hardware description language, we can see under the light of the devices used are Altera EP2c35
- 2023-09-07 02:45:04下载
- 积分:1
-
OFDM-Verilog
基于FPGA的OFDM的实现,Verilog语言。(OFDM based on FPGA,by Verilog)
- 2021-02-03 20:59:58下载
- 积分:1
-
DE2_Basic_Computer
DE2 altera board vhdl design
- 2016-04-09 00:35:05下载
- 积分:1
-
华为_大
华为_大规模逻辑设计指导书,看看人家是怎么管理FPGA编程的,真的获益匪浅-Huawei _ large-scale logic design guide book, take a look at how the management of people FPGA programming, and really benefited from
- 2023-01-02 23:55:03下载
- 积分:1
-
CLZ32
针对32位MIPS微处理器中CLZ指令(对单个字高位连零进行计数)的实现电路,使用了类似于超前进位的逻辑结构。包含测试文档,以及Design
Compile所用的环境和脚本。(The CLZ instruction counts the number of leading zeros in a word. The 32-bit word in the GPR rs is scanned from most-significant to least-significant bit.The number of leading zeros is counted and the result is written to the GPR rd. If
all 32 bits are cleared in the GPR rs, the result written to the GPR rd is 32. )
- 2021-03-31 19:39:08下载
- 积分:1
-
彩条产生程序 color_bar
说明: 彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)
- 2020-06-22 06:20:01下载
- 积分:1
-
三角波的产生
这是源代码,该代码为三角波的一代,在 VHDL 写。欢迎下载。谢谢你的支持。
- 2022-08-03 08:08:41下载
- 积分:1
-
Verilog languages with four arithmetic logic unit ALU, functional reference to 7...
用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
- 2023-07-06 11:15:03下载
- 积分:1
-
3Verilog语言要素
说明: Verilog学习文档,介绍基本知识点,语言要素(for learning Verilog)
- 2020-03-24 10:01:15下载
- 积分:1