-
RS码译码器
采用VHDL语言实现基于BM算法的RS译码器,附件为整个工程文件,内附波形仿真图。程序在QUARTUS II 9.0下仿真通过
- 2022-06-03 16:19:45下载
- 积分:1
-
shengyinchuli
通过matlab对于声音进行处理,实现FFT,均值,方差,中值滤波,自相关分析,白噪声等处理(Matlab sound processing, FFT, mean, variance, median filtering, autocorrelation analysis, white noise and processing)
- 2021-03-01 22:29:34下载
- 积分:1
-
simpleCpu
relative cpu design implementation
- 2013-08-14 21:22:39下载
- 积分:1
-
5_lcd_ST7565P_12864
液晶ST7565P_12864驱动,实现打点成图。(LCD ST7565P_12864 drive, dot mapping.)
- 2012-04-04 20:01:42下载
- 积分:1
-
3FP
一个三分频verilog模块,可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)
- 2013-08-25 00:41:29下载
- 积分:1
-
Verilog written procedures for counting frequency meter module,
verilog写的频率计程序的计数模块,-Verilog written procedures for counting frequency meter module,
- 2022-03-20 18:03:19下载
- 积分:1
-
这是个的VHDL点亮LED的程序,大家一齐分享吧
这是个的VHDL点亮LED的程序,大家一齐分享吧-This is a LED light up the VHDL procedure, let everyone together to share
- 2022-01-22 01:19:17下载
- 积分:1
-
4-to-1
4选1数据选择器,有使能端控制,4个数据输入,2个地址端,1个输出(4 1 data selector, enable end control, four data inputs, two addresses end, an output)
- 2012-10-15 18:48:38下载
- 积分:1
-
用 vhdl 语言实现的快速吠陀数学乘法
此文档包含 VHDL 的Vedic 乘数的详细内容。
它内容Vedic 乘数过程的详细的解释。
- 2023-04-07 00:45:03下载
- 积分:1
-
FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
FPGA实现的LCD接口,VHDL编程,FPGA芯片为ALtera公司的EP2c35-FPGA realization of the LCD interface, VHDL programming, FPGA chips for Altera
- 2022-09-14 14:30:09下载
- 积分:1