-
vhdl_quick-learn
vhdl learnig material............
- 2015-08-07 19:09:24下载
- 积分：1
-
VC707_MIG_DDR3
说明： VC707_MIG_DDR3.sim文件夹中是仿真的文件：testbench和DDR3模型参数
VC707_MIG_DDR3.srcs文件夹中是源文件，包含DDR3的控制、收发模块、顶层文件(VC707_ MIG_ In ddr3.sim folder are simulation files: testbench and DDR3 model parameters
VC707_ MIG_ Ddr3.srcs folder is the source file, including DDR3 control, transceiver module, top-level file)
- 2020-10-16 19:20:53下载
- 积分：1
-
jjiaotongdeng
实现fpga上交通灯的设计，可以在开发板上实现红绿灯(Design of traffic lights on FPGA)
- 2018-08-28 16:42:27下载
- 积分：1
-
FUNCTIONALITY OF ATM
ATM的功能工作.atmatmamtmtmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttttt
- 2022-01-25 21:13:03下载
- 积分：1
-
LDPC码编译码算法的研究与实现_陈石平
本文首先回顾了LDPC码的发展历程和现状，介绍了LDPC码检验矩阵的构造、编
译码原理。在对编译码作了深入探讨和分析后，接着进行了RU算法编码和长码编码
的FPGA实现;根据二叉树的性质，提出了一种长码编码的ASIC优化设计的方法，节省
了大量硬件资源;论文详细阐述了CORDIC算法原理以及LDPC码译码中所采用的指
数函数和反双曲正切函数的FPGA实现:CORDIC内核及前后处理单元设计、仿真、综
合及数据分析，这对LDPC码的译码具有很重要的意义，为用数字VLSI来实现LDPC的
译码奠定了基础。同时在基于校验矩阵的环路检测定理基础上，将校验矩阵转化为转
移概率矩阵，详细分析并提出了一种基于转移概率矩阵的围长检测方法，并对其进行
了理论证明，具有很好的围长检测效果，以及状态分类判别。(Research and implementation of LDPC coding and decoding technology)
- 2018-04-08 18:49:59下载
- 积分：1
-
qpsk
QFSK的调制与解调，用C写的主程序，汇编写的调制与解调的子程序(QFSK the modulation and demodulation, with the main program in C, compile writing, the modulation and demodulation of the Subprogram)
- 2020-07-01 19:20:02下载
- 积分：1
-
led_test
在Quartus II 上编程的基于FPGA的LED显示实验(Programming in the Quartus II LED display experiment based on FPGA
)
- 2013-08-13 08:55:45下载
- 积分：1
-
cpsk_dpsk
数字通信系统相移键控CPSK信号和差分相移键控的调制与解调的VHDL代码(Phase shift keying digital communication system CPSK signals and differential phase-shift keying modulation and demodulation of the VHDL code for)
- 2009-11-06 16:11:03下载
- 积分：1
-
锁相环LMX2531的verilog配置程序
本源码采用verilog程序编写，用于配置锁相环LMX2531的寄存器，输出频率为1 GHz，寄存器的值已经经过验证，时钟输出频率没有问题，采用三段式状态机编写，顺带配置了一个AD器件，请读者选择重点参考。
- 2022-03-10 02:21:50下载
- 积分：1
-
VGA
verilog vga 图像处理(verilog vga)
- 2013-10-15 19:00:16下载
- 积分：1
