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DEBOUNCE
DEBOUNCEfpga的实现，运用软件实现数码管的变化(fpga of the)
- 2013-06-03 18:25:49下载
- 积分：1
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here is realized simple FIFO stack in vhdl.
very simple example, but very help...
here is realized simple FIFO stack in vhdl.
very simple example, but very helpful.
- 2022-03-12 07:44:59下载
- 积分：1
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Application of VHDL on the SPI procedures. For novices to learn.
关于SPI应用VHDL程序。供新手学习用。-Application of VHDL on the SPI procedures. For novices to learn.
- 2023-02-26 18:45:03下载
- 积分：1
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modulation-and-demodulation
通过verilog语言实现各种基本信号的调制解调过程，包括2psk,qpsk,ppm(Realize the modulation and demodulation process of various basic signals through verilog language, including 2psk, qpsk, ppm)
- 2018-04-26 21:52:04下载
- 积分：1
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qpsk_demod_use_FPGA
根据软件无线电的思想，提出了一种新颖的数字信号处理算法，对QPSK信号的相位进行数字化处理，从而实现对QPSK信号的解调.该算法允许收发两端载波存在频差，用数字锁相实现收发端载波的同步，在频偏较大的情况下，估算频偏的大小，自适应设置环路的带宽，实现较短的捕获时间和较好的信噪性能。整个设计基于XILINX公司的ISE开发平台，并用Virtex-II系列FPGA实现。用FPGA实现调制解调器具有体积小、功耗低、集成度高、可软件升级、扰干扰能力强的特点，符合未来通信技术发展的方向。(According to the idea of software radio, a novel digital signal processing algorithm, the phase of QPSK digital signal processing, enabling the demodulation of QPSK signals. This algorithm allows the sending and receiving ends of the carrier frequency difference exists, using digital phase-locked to achieve synchronization of sending and receiving end of the carrier, in the case of large frequency offset, frequency offset estimation of the size, adaptive set the loop bandwidth to achieve shorter acquisition time and better noise performance. The whole design is based on the company XILINX ISE development platform, and Virtex-II series with the FPGA. FPGA realization of a modem with a small size, low power consumption, high integration, software upgrades available, the characteristics of strong interference interference, in line with the future direction of ICT development.)
- 2010-12-06 10:52:36下载
- 积分：1
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Practical-Statecharts-in-C-and-CPP
QP编程创始人所著的介绍QP编程思想的书，中文版。QP是用于嵌入式中状态机编程的开源软件。(QP programming book written by the founder of the introduction of QP programming ideas, and Chinese version. QP is open source software for embedded state machine programming.)
- 2015-03-07 18:00:15下载
- 积分：1
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basic_cpu_mano_ise_vhdl
morris mano basic vhdl code in ise
- 2014-01-13 05:52:01下载
- 积分：1
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我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证...
我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates
- 2022-07-25 14:12:00下载
- 积分：1
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ANALYSIS-OF-FULL-ADDER
DESCRIPTION OF FULL ADDER
- 2013-11-12 13:32:19下载
- 积分：1
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Timing1111_Symcronization
使用Verilog编写的时间同步模块，解决位同步问题，ISE12.2下编译通过(Time synchronization module written in Verilog, bit synchronization issues under ISE12.2 compiled by)
- 2021-05-07 14:28:36下载
- 积分：1
