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fir
该程序实现了一个FIR滤波加速器,该程序在FPGA板上开发,通过使用VHDL语言来定义RS232端口的使用(design a FIR Filter Accelerator based on FPGA board and RS232 interface using VHDL language. )
- 2013-06-07 06:27:32下载
- 积分:1
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FPGA中实现的硬件UDP 协议
FPGA中实现的硬件UDP 协议 FPGA中实现的硬件UDP 协议
- 2022-03-23 19:25:50下载
- 积分:1
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8 位加法器
有一个 8 位全加器 VHDL 代码。我测试该代码在协同,看到了这段代码的工作。
- 2022-04-21 11:16:03下载
- 积分:1
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fht_latest.tar
FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING
- 2013-08-19 13:47:40下载
- 积分:1
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周立功sopc教程的视频资料,适合广大自学者学习
周立功sopc教程的视频资料,适合广大自学者学习-ZLG sopc video tutorial is suitable for the general self-learners to learn
- 2022-02-06 20:02:55下载
- 积分:1
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这是一个HDB3的译码器,实现从HDB3双极性码到高低电平二值序列的转化...
这是一个HDB3的译码器,实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences
- 2022-03-23 10:36:34下载
- 积分:1
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用verilog编写的1024点的fft快速傅立叶变换
用verilog编写的1024点的fft快速傅立叶变换-Verilog prepared using 1024 point fft Fast Fourier Transform
- 2022-05-07 18:57:45下载
- 积分:1
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1_ADDER
说明: 第1例到第6例的源描述都是从第8例的程序包中
提取出来的,不能单独编译,这些例子的编译与
模拟请参考第8例.(Example No. 1 to the first six cases are the source described in Example 8 from the first package to extract it and can not be a separate compiler, which compiler and simulation examples please refer to the first eight cases.)
- 2008-09-09 18:00:16下载
- 积分:1
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codings
wavelet transform of a signal,it is important and useful code to trans form frequency to time domain
- 2013-11-10 15:10:32下载
- 积分:1
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verilog-montgomery-RSA
基于Montgoery 算法的RSA,FPGA verilog 实现,有测试文件(Based on Montgoery algorithm for RSA,FPGA verilog implementation,bench file)
- 2021-04-27 20:28:44下载
- 积分:1