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fadd16
实验用16位全加器的VHDL代码,适合初学者学习,数电学习的好工具。
(Experiment with 16-bit full adder VHDL code for beginners to learn, a good tool to learn a few power.)
- 2010-05-11 20:37:34下载
- 积分:1
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The experimental results are used to prepare MOSIN6 is achieved Verilog HDL lang...
有实验结果,用MOSIN6编写的,是Verilog HDL语言实现的.
练习三 利用条件语句实现计数分频时序电路
实验目的:
1. 掌握条件语句在简单时序模块设计中的使用;
2. 学习在Verilog模块中应用计数器;
3. 学习测试模块的编写、综合和不同层次的仿真。
练习四 阻塞赋值与非阻塞赋值的区别
实验目的:
1. 通过实验,掌握阻塞赋值与非阻塞赋值的概念和区别;
2. 了解阻塞赋值与非阻塞赋值的不同使用场合;
3. 学习测试模块的编写、综合和不同层次的仿真。
-The experimental results are used to prepare MOSIN6 is achieved Verilog HDL language. Practice the use of conditional statements to achieve the three sub-frequency timing circuit count experimental purposes: 1. Have conditional statements in the simple timing of the use of modular design 2. Learning modules in the Verilog Application of counter 3. to learn the preparation of the test module, integrated and different levels of simulation. Practicing the four blocking assignment with the distinction between non-blocking assignment experimental purposes: 1. Through experiments, hands blocking assignment with the concept of non-blocking assignment and distinction 2. Understanding of blocking and nonblocking assignment assignment usi
- 2022-03-18 15:26:04下载
- 积分:1
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Giga8b10bv10
说明: altera发布的开源8b10b源代码,vhdl语言描述(altera released the source code open source 8b10b, vhdl language description)
- 2021-01-22 18:18:41下载
- 积分:1
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I2C控制核设计,由VHDL语言编写,使普通I/O端口实现I2C性能
I2C控制核设计,由VHDL语言编写,使普通I/O端口实现I2C性能-I2C control of nuclear design, VHDL language, I/O ports I2C Performance
- 2023-04-17 20:45:02下载
- 积分:1
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基于FPGA实现数控机床高速运动的DDA设计
本文利用FPGA 可以弥补硬件插补器的不足,是执行速度提高,且可与运动控制部分很好的集成,制成运动控制器,实现高速运动控制
- 2022-03-10 10:19:20下载
- 积分:1
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利用VHDL语言编写的一个crc功能模块,可下载到FPGA实现功能
利用VHDL语言编写的一个crc功能模块,可下载到FPGA实现功能-use VHDL to prepare a crc function of the module, which can be downloaded to the FPGA functions
- 2022-11-05 00:45:02下载
- 积分:1
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dl.sh
linux cmd line download script
- 2012-03-15 02:51:11下载
- 积分:1
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HDMI_FPGA
该源码可基于FPGA设置多分辨率的HDMI显示,且其包含了完整的时序和端口、地址映射,可以很方便的将其移植(The source code can be set based on FPGA multi-resolution HDMI display, and it includes a complete timing and port, address mapping, it can be easily transplanted)
- 2020-12-17 11:09:12下载
- 积分:1
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本文提供了一个CMOS控制器,使Nios II可以利用C.
本文提供了一种CMOS控制器,使Nios-II可以利用CMOS控制器控制CMOS,并允许在CMOS图像上传送SDRAM。在DE2-70平台上运行
- 2022-02-12 08:29:38下载
- 积分:1
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PS2
基于FPGA的键盘PS第二类编码方式的verilog解码程序。基于FPGA的键盘PS第二类编码方式的verilog解码程序。(FPGA keyboard PS encoding the verilog decoding procedures. FPGA keyboard PS encoding the verilog decoding procedures.)
- 2013-04-13 20:02:06下载
- 积分:1