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vhdl实现的鼠标协议，代码可读性高，适合作为参考案例。
vhdl实现的鼠标协议，代码可读性高，适合作为参考案例。-VHDL realize mouse agreement, the code readable, suitable as a reference case.
- 2022-02-06 08:18:06下载
- 积分：1
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adder8
8位加法器源代码，vivado实现编写。(8 adder Source, vivado achieve write.)
- 2015-12-01 20:35:55下载
- 积分：1
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duishuizhtai
matlab 并行程序parfor用法matlab 并行程序parfor用法(matlab 并行程序parfor具体用matlab 并行程序parfor用法)
- 2020-07-03 17:40:02下载
- 积分：1
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det
double edfe trigger d latch
- 2014-01-07 19:55:29下载
- 积分：1
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UART
通过PC串口调试助手向MINI板发数据（HEX），在数码管显示接收到的数据，并回传给PC(The debugging assistant sends data (HEX) to MINI board through PC serial port, displays the received data in the digital tube and sends it back to PC)
- 2018-11-15 22:36:21下载
- 积分：1
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适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.
适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.-Applicable to FPGA beginners, a procedure for light water, using the Verilog language.
- 2022-04-09 16:22:19下载
- 积分：1
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ADc
与单片机相比，用CPLD/FPGA器件更适合于直接对高速AD采样控制。本实验接口器件为ADC0809，根据ADC0809的工作时序使用CPLD产生该控制信号，CPLD启动AD转换后，得到的数据送至单片机并在PC机及数码管上显示AD转换结果。(Compared with the microcontroller, CPLD/FPGA devices more suitable for direct sampling control of high-speed AD. The interface of the experimental device for the ADC0809 ADC0809 Timing CPLD is used to generate the control signal, the CPLD to start the AD conversion, the data sent to the microcontroller and the AD conversion result on the PC and digital tube display)
- 2021-03-29 11:19:10下载
- 积分：1
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ＶＨＤＬ编写的flash控制器源代码.包含testbench。
ＶＨＤＬ编写的flash控制器源代码.包含testbench。-Prepared by flash controller VHDL source code. Contains testbench.
- 2022-03-18 10:11:40下载
- 积分：1
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cyc2_cii5v1
这是1C6开发板上元件的具体资料。此开发板有掉电不丢失程序的功能，就是靠着几个芯片(development board components specific information. This development board is not lost restart procedures, it was relying on a few chips)
- 2007-02-15 10:22:14下载
- 积分：1
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alpha011410
Firmware setopbox Ali3329B
- 2016-04-03 19:16:28下载
- 积分：1
