-
PIC单片机学习软件及其资料
PIC单片机学习软件及其资料，入门到精通(PIC MCU learning software and its information, entry to proficiency)
- 2019-07-04 17:17:40下载
- 积分：1
-
5_lcd_ST7565P_12864
液晶ST7565P_12864驱动，实现打点成图。(LCD ST7565P_12864 drive, dot mapping.)
- 2012-04-04 20:01:42下载
- 积分：1
-
65位FIR数字滤波器的设计~~其中有通过仿真得出得数据 ~可以通过数据输入完成滤波实验~对数字滤波器得整个算法进行了分析包括输入分组相加 然后相乘得过程...
65位FIR数字滤波器的设计~~其中有通过仿真得出得数据 ~可以通过数据输入完成滤波实验~对数字滤波器得整个算法进行了分析包括输入分组相加 然后相乘得过程-65 FIR digital filter design ~ ~ with simulation data to come in through the importation of data from experiments completed filtering of the digital filter in the whole algorithm analysis including input a sum then multiply in the process
- 2022-01-30 18:45:51下载
- 积分：1
-
NAND_flash_verilog_vhdl
很好的NAND Flash 硬件驱动语言，支持VHDL和verilog 语言方便移植，如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。(NAND Flash Controller Reference
This reference design is used to interface a NAND Flash device and provides a simple host end interface. The host
end interface of this design is user-configurable. It provides buffer select signal, buffer write enable signal, address
bus, data bus, error status signal, control and handshake signals for the user......)
- 2021-03-08 22:59:28下载
- 积分：1
-
16QAM-modulation-based-on-FPGA
基于FPGA的16QAM调制程序,基于verilog开发环境(16QAM modulation program based on FPGA-based development environment verilog)
- 2014-05-07 14:05:25下载
- 积分：1
-
modbus_latest.tar
modbus的fpga实现。opencores上最新版本。使用fpga实现，可以大大提高响应速度，对其功能进行模块化。(modbus of fpga implementation. opencores the latest version. Use fpga implementation, can greatly improve the response speed, its function modularity.)
- 2020-10-22 10:37:23下载
- 积分：1
-
sobel
由Verilog编写在FPGA实现sobel算法应用于图像边缘检测，工程文件可在quartus13.1以上版本打开；工程使用到ram、fifo、pll三种ip核，design文件夹下包含ram、fifo、vga控制以及串口收发和sobel算法模块，sim和doc文件夹下分别包含modelsim的仿真模块和仿真结果；测试时将200*200分辨率的图片用matlab文件夹下的matlab脚本压缩、二值化，再将生成文件中数据用串口发给FPGA，边缘检测结果会通过VGA输出。(Written by Verilog in the FPGA implementation sobel algorithm applied to the edge detection of the image, the project file can be opened in the quartus13.1 or later project use ram, fifo, pll three ip kernel, design folder contains ram, fifo, vga control and Serial port transceiver and sobel algorithm module, sim and doc folder, respectively, include modelsim simulation module and simulation results test will be 200* 200 resolution picture matlab folder under the matlab script compression, binarization, and then generated Data in the file with the serial port to the FPGA, edge detection results will be output through the VGA.)
- 2021-01-15 21:08:46下载
- 积分：1
-
计算机组成原理课设
计算机组成原理课程设计代码，课程设计，计组(Computer organization principle curriculum design code, curriculum design, group calculation)
- 2018-10-31 22:26:09下载
- 积分：1
-
HDLC接口协议的FPGA实现使用verilog
HDLC接口协议的FPGA实现使用verilog-design of HDLC
- 2022-06-02 20:47:21下载
- 积分：1
-
verilog-2-1-4
卷积码（2,1,4）编解码的FPGA实现(Convolution code (2,1,4) decoding the FPGA implementation)
- 2020-12-27 21:09:02下载
- 积分：1
