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DDR2_hardcore_userguide
xillinx Spartan6 FPGA DDR 接口设计指南(xillinx Spartan6 FPGA DDR Interface Design Guidelines)
- 2009-11-23 10:18:28下载
- 积分：1
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Example-3-1
说明： 经过验证的经典实例，完全正确的。适合于入门新手的实例，仅供交流使用。(fpga exampe)
- 2009-08-17 22:07:13下载
- 积分：1
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mig_7series_v1_9
DDR3控制器源码，针对XilinxFPGA的DDR3控制器的源码，已经验证通过。(DDR3 Controller，complete DDR3 controll，have pass verificaion.)
- 2016-08-16 09:27:43下载
- 积分：1
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chaotic_1d
说明： 一维超混沌随机数的生成verilg，还有testbench仿真激励，modelsim的仿真工程。(The generation of one-dimensional hyperchaotic random number verilg, testbench simulation stimulation and Modelsim simulation engineering.)
- 2020-05-11 12:45:42下载
- 积分：1
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main
完整的GMSK调制及维特比译码，程序中包括了高斯滤波器的设计，调制相位的计算，并采用了维特比译码算法解调出原始码元，最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分：1
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这是我自己编写的三分频，也就是奇数分频，占空比为1：1，当然如果需要其它奇数分频，只要将程序里面的N和counter修改即可...
这是我自己编写的三分频，也就是奇数分频，占空比为1：1，当然如果需要其它奇数分频，只要将程序里面的N和counter修改即可-This was my third prepared by the frequency, which is odd hours, frequency and duty ratio of 1:1. Of course, if the needs of other odd hours, frequency, as long as the proceedings inside the N and counter can be amended
- 2022-10-27 10:05:04下载
- 积分：1
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Interleaver_Deinterleaver
通信中卷积交织/解交织FPGA源程序，采用verilogHDL代码实现，包含测试程序，经过验证。(Communication in the convolutional interleaving/de interleaving FPGA source program, using verilogHDL code to achieve, including test procedures, after verification.)
- 2021-04-17 15:18:53下载
- 积分：1
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McBSP_8bit_Asyn
基于FPGA的Mcbsp通信源码，经过项目实测检验(Mcbsp communication source code based on FPGA,Through the test of the project.)
- 2018-03-19 17:19:17下载
- 积分：1
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Clifford-E.-Cummings-paper
Clifford E. Cummings论文合集，其中关于FIFO的设计很经典(Clifford E. Cummings collection of papers, on the FIFO design classic)
- 2012-07-21 01:32:34下载
- 积分：1
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Get-20-point
this program get 20 point from user and draw functions.
- 2014-01-09 03:25:06下载
- 积分：1
