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lisa-vhdl2va
通过modelsim仿真检测matlab生成滤波器效果。(Generate the filter through matlab and simulated by modelsim.)
- 2013-12-12 11:17:18下载
- 积分：1
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DE2_70_TV
de2 70 开发板的演示程序，verilog语言编写，视频输入输出(de2 70 development board demo program, verilog language written, video input and output)
- 2013-04-09 19:29:51下载
- 积分：1
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4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好...
4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好-The 4dbpsk system design realization source code, several friends complete it cooperation in one vacation time , the function is extremely good
- 2022-02-04 07:05:28下载
- 积分：1
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这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面
这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10
- 2022-02-06 13:26:07下载
- 积分：1
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Simple I2C controller
Simple I2C controller
-- 1) No multimaster
-- 2) No slave mode
-- 3) No fifo s
--
-- notes:
-- Every command is acknowledged. Do not set a new command before previous is acknowledged.
-- Dout is available 1 clock cycle later as cmd_ack
-Simple I2C controller-- 1) No multimaster-- 2) No slave mode-- 3) No fifo"s---- notes :-- Every command is acknowledged. Do not set a ne w command before previous is acknowledged.-- D is available out a clock cycle later as cmd_ack
- 2023-03-08 10:05:03下载
- 积分：1
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callback
This is code of UVM CALLBACK function.
- 2020-06-24 15:40:02下载
- 积分：1
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xilinx平台DDR3设计教程之综合篇_中文版教程
存储器DDR3在Xlinix平台上的设计教程和综合应用(Design course and comprehensive application of memory DDR3 on Xlinix platform)
- 2018-11-02 11:23:55下载
- 积分：1
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基于FPGA的温度计源代码，VHLL语言
基于FPGA的温度计源代码，VHLL语言-Thermometer-based FPGA source code, VHLL language
- 2023-06-09 16:00:03下载
- 积分：1
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FDDDDRSDRAMP
一种基于FPGA 实现DDDR SDRAM的控制器
(DDDR SDRAM controller based on FPGA)
- 2012-08-29 23:52:53下载
- 积分：1
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TIMING LEARNING
TIMING LEARNING -TIMING LEARNING
- 2023-04-26 09:15:03下载
- 积分：1
