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在接收信号的数字化、软化的实现中,数字下变频起着重要的作用。本文首先介绍了数字下
变频的组成结构,然后详细分析了数字下变频的工作原理,描述了在实现数字下变频时,设计方案所
采用的高效滤波器———CIC 滤波器和多相抽取滤波器的结构和原理。最后,用通过Simulink 对数字
下变频的性能进行了仿真。在仿真的基础上使用Insight 公司的FPGA 开发系统,用测试电路实测了
数字下变频的性(In the receiving digital signal, softening the realization, the digital down-conversion plays an important role. This article first introduced the digital down conversion of the composition, and then a detailed analysis of digital down conversion of the working principle described in the realization of digital down conversion, the design used in high-performance filters--- CIC filters and multi-phase extraction filter structure and principle. Finally, with the adoption of Simulink for digital down-conversion performance of the simulation. In the simulation based on the use of Insight s FPGA development system is measured using the test circuit of the digital down-conversion of)
- 2021-03-16 21:29:21下载
- 积分：1
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DDS
文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和
设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and
Design of high resolution, high stability function of the signal
)
- 2013-08-27 14:20:22下载
- 积分：1
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zong
说明： quartusII 9.1，位同步提取电路，可以实现位同步时钟提取，其中包括分频器，和由D触发器以及与门组成的鉴相器模块。(Quartus II 9.1, bit synchronous extraction circuit, can realize bit synchronous clock extraction, including frequency divider, phase discriminator module composed of D trigger and and gate.)
- 2020-01-11 13:40:31下载
- 积分：1
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xapp1071
高速ADC及DAC接口的参考设计。在Xilinx FPGA上实现。(Reference design of xapp1071.)
- 2012-05-22 15:34:04下载
- 积分：1
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CNTRTEST3_7tx_rx_0422
在ISE12.4与TMS320F2812的XINTF接口，实现数据收发(In ISE12.4 TMS320F2812 the XINTF, data transceiver)
- 2021-01-08 10:48:51下载
- 积分：1
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一个用VHDL完成的8位数显的16进制的频率计
一个用VHDL完成的8位数显的16进制的频率计-a VHDL completed 8 of 16 significant median band of frequency meter
- 2022-01-31 16:47:07下载
- 积分：1
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IDT7005
双端口静态RAM的VHDL程序，具体芯片型号为IDT7005(DUAL-PORT
STATIC RAM)
- 2014-04-03 11:40:53下载
- 积分：1
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FPGA_Turbo
Turbo码编解码的FPGA实现，verilog语言编写(Implementation ofTurbo code on FPGA , using Verilog language)
- 2021-04-19 09:48:51下载
- 积分：1
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cn60
六十进制计数器用于计数等操作，代码的实现方式很简单(Six decimal counter for counting operation, the code is very simple implementations)
- 2014-12-10 10:10:50下载
- 积分：1
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GAL
有关gal器件的编程入门，以及常见逻辑门、计数器VHDL程序(For gal device programming entry, as well as common logic gates, counters VHDL program)
- 2013-07-09 22:50:01下载
- 积分：1
